Single transistor E.sup.2 PROM memory device

Details Single transistor E.sup.2 PROM memory device Single transistor E.sup.2 PROM memory device

1995-11-17

1998-06-30

Monin, Donald

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257321, 365185, H01L 2968, H01L 2934, H01L 2904

Patent

active

057738610

ABSTRACT:
A semiconductor memory cell device exhibiting superior cell reliability comprising a dual layer floating gate wherein the thin upper layer of the floating gate overlaps the edges of surrounding field insulating regions and has rounded edges to minimize leakage concerns. The tunnel dielectric separating the dual layer floating gate from the substrate comprises a layer of uniform thickness which is grown prior to the formation of the field insulating regions. The Fowler-Nordheim tunneling mechanism is used for programming and erasing the inventive cells in a programming process flow which comprises flash programming all cells on a word line, sensing current on a selected cell, and selectively erasing the charge on the cell by applying a higher voltage on the intersecting bit line than is applied to the word line, until the sensed current is as desired.

REFERENCES:
patent: 5005155 (1991-04-01), Radjy et al.
patent: 5017979 (1991-05-01), Fujii et al.
patent: 5284786 (1994-02-01), Sethi
patent: 5300802 (1994-04-01), Komori et al.
patent: 5321699 (1994-06-01), Endoh et al.
patent: 5338957 (1994-08-01), Fukumoto et al.

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