Single transistor charge transfer random access memory

Details Single transistor charge transfer random access memory Single transistor charge transfer random access memory

2011-07-05

2011-07-05

Nguyen, Dao H (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

Reexamination Certificate

active

07973348

ABSTRACT:
A nonvolatile semiconductor memory device is described where each memory cell is composed of a single field effect transistor with a dual gate dielectric comprising a dielectric interfacial layer in contact with a silicon substrate and a ferroelectric layer in between the interfacial layer and the gate electrode. To program (write) the cell the ferroelectric layer is polarized in one of two directions, the ferroelectric polarization creating a large electric field in the interfacial layer. This electric field causes electrons or holes to be transported across the interfacial layer and be trapped in the ferroelectric layer establishing a high (erased) or low (programmed) threshold voltage depending on the direction of the ferroelectric polarization representing the two logic states. To read the memory cell a voltage is applied to the drain of the selected transistor and depending on whether a high or low threshold state was programmed into the cell a low or high current is sensed.

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