Single step, high temperature nucleation process for a...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S604000, C438S607000, C257SE21097, C257SE21108, C257SE21112, C257SE21118, C257SE21126

Reexamination Certificate

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11069040

ABSTRACT:
A single step process for nucleation and subsequent epitaxial growth on a lattice mismatched substrate is achieved by pre-treating the substrate surface with at least one group III reactant or at least one group II reactant prior to the introduction of a group V reactant or a group VI reactant. The group III reactant or the group II reactant is introduced into a growth chamber at an elevated growth temperature to wet a substrate surface prior to any actual crystal growth. Once the pre-treatment of the surface is complete, a group V reactant or a group VI reactant is introduced to the growth chamber to commence the deposition of a nucleation layer. A buffer layer is then grown on the nucleation layer providing a surface upon which the epitaxial layer is grown preferably without changing the temperature within the chamber.

REFERENCES:
patent: 5625202 (1997-04-01), Chai
patent: 5679152 (1997-10-01), Tischler et al.
patent: 5834379 (1998-11-01), Shealy
patent: 5909036 (1999-06-01), Tanaka et al.
patent: 6177292 (2001-01-01), Hong et al.
patent: 6218280 (2001-04-01), Kryliouk et al.
patent: 6478871 (2002-11-01), Shealy

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