Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to nonconductive state
Reexamination Certificate
2006-03-27
2010-10-12
Richards, N. Drew (Department: 2895)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to nonconductive state
Reexamination Certificate
active
07811866
ABSTRACT:
An integrated circuit structure comprising a fuse and a method for forming the same are provided. The integrated circuit structure includes a substrate, an interconnection structure over the substrate, a fuse connected to the interconnection structure, and an anti-reflective coating (ARC) on the fuse. The ARC has an increased thickness and acts as a remaining oxide, and no further remaining passivation layer exists on the ARC.
REFERENCES:
patent: 6294474 (2001-09-01), Tzeng et al.
patent: 2003/0153173 (2003-08-01), Chuang
patent: 2005/0142834 (2005-06-01), Lee
patent: 583728 (2004-04-01), None
Hou Shang-Yun
Jeng Shin-Puu
Tsai Chia-Lun
Tsai Hao-Yi
Wu Anbiarshy N. F.
Richards N. Drew
Slater & Matsil L.L.P.
Taiwan Semiconductor Manufacturing Company , Ltd.
Withers Grant S
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