Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2003-06-10
2004-04-20
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S189011, C365S189050, C365S230080
Reexamination Certificate
active
06724680
ABSTRACT:
BACKGROUND OF THE INVENTION
1. The Field of the Invention
The present invention relates to a single integrated circuit flash memory controller, and more particularly to a single IC flash memory controller for activating external ROM sharing a common USB port so that no extra pin terminals is required incurring no extra space occupation.
2. Description of the Related Art
With the rapid development in the information technology, ideally most of the circuit systems are integrated into a single integrated circuit, so that single integrate circuit having multi-function can be designed with a view of making a more compact, smaller in size and less expensive electronic products.
Referring to
FIG. 1
, a typical single integrated circuit
10
comprises a CPU
11
, and the program code of the CPU
11
can be retrieved by two methods. One method includes retrieving the program code prestored in an internal ROM
12
directly via the route set within the single integrated circuit
10
. The other method includes retrieving the program code prestored in an external ROM
13
by connecting to the external ROM
13
through an external connection port comprising a plurality of pin terminals with the single integrated circuit
10
. However, in some particular circumstances, the external ROM
13
must be connected to the single integrated circuit
10
, for example, when the storage space of the internal ROM
12
is insufficient or the program code of the internal ROM
12
needs to be modified according to various requirements, and the like. In the condition mentioned above, the CPU
11
needs to have external connection port for connecting the external ROM
13
for communication with the single integrated circuit
10
so that the modified program code of the CPU
11
can be retrieved. Accordingly, most of the single integrated circuit
10
has a reserved route for connecting with the external ROM
13
.
Generally, the ROM that can be applied in the single integrated circuit is classified as writable fash ROM and write-once Mask ROM. The single integrated circuit with flash ROM is advantageously suitable for modification of the CPU program code according to various requirements or renewing the CPU program code, and therefore the single integrated circuit with flash ROM are easy to upgrade the products. However, the cost of such type of flash ROM is more expensive.
As shown in
FIG. 2
, shows another circuit layout comprising a single integrated circuit flash memory integrated circuit
20
having a low cost internal Mask ROM
21
connected to an external flash ROM
22
in order to extend the memory capacity of the single integrated flash memory integrated circuit
20
. Thus the Mask ROM
21
can be used in a general situation when it is needed to improve the function of the single integrated circuit flash memory integrated circuit
20
, the external flash ROM
22
is used for renewing the program code of CPU
23
when necessary.
Nevertheless, the single integrated circuit flash memory integrated circuit
20
not only connects to the pin terminals of a server
24
but also connects to the pin terminals of a plurality of flash Memory devices
25
which function as a data storage unit. Additionally, the single integrated circuit flash memory integrated circuit
20
also needs connects to the pin terminals of the external flash ROM
22
, but however, the single integrated circuit flash memory integrated circuit
20
does not have sufficient pin terminals for implementing such connections. Therefore, it is highly desirable to increase the numbers of the pin terminals of the single integrated circuit flash memory integrated circuit
20
in order to meet above requirements. One way of overcoming the above problems is to increase the overall size of the integrated circuit package however this would substantially increase the fabrication cost.
SUMMARY OF THE INVENTION
Accordingly, in the view of the foregoing, the present inventor makes a detailed study of related art to evaluate and consider, and uses years of accumulated experience in this field, and through several experiments, to create a new single integrated circuit flash memory controller for activating an external ROM sharing a common USB port so that no extra pin terminals is required incurring no extra space occupation. The present invention provides a novel and cost effective single integrated circuit flash memory controller for activating the external ROM.
According to one aspect of the present invention the single integrated circuit flash memory controller having a shared USB port for connecting both the flash memory and the external ROM, such that while retrieving data from the flash memory, the external ROM still remain in operational status.
According to the above aspect of the present invention, the external ROM and all of the flash memory devices share the same data and IP USB port, and more particularly the external ROM and all the flash memory share the same pin terminals of the data and IP USB port. When the CPU is operating, the operating time of the external ROM and all the flash memory are designed or programmed to function in an alternative manner, for example, the flash memory will not be activated while the external ROM is operating to retrieve the program code. On the contrary, while data is being retrieved from the flash memory, the CPU will be in a waiting status, in other words, the CPU does not function to retrieve the program code from the external ROM while the data is being retrieved from the flash memory. Accordingly, this design makes it possible for the single integrated circuit flash memory controller to accommodate required connections for connecting with the external ROM as well as all the flash memory without the need to increasing pin terminals or the size of the integrated circuit package.
REFERENCES:
patent: 5634079 (1997-05-01), Buxton
patent: 5951685 (1999-09-01), Stancil
patent: 5991889 (1999-11-01), Hikichi et al.
patent: 6647100 (2003-11-01), Sneed
Awyong Chee-Kong
Ng Soo-Ching
Dinh Son T.
Phison Electronics Corp.
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