Electrical computers and digital processing systems: processing – Processing control – Processing control for data transfer
Reexamination Certificate
2000-01-28
2003-04-01
Treat, William M. (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Processing control for data transfer
C712S024000, C712S202000, C345S504000, C345S522000
Reexamination Certificate
active
06542989
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to data processing by means of an arithmetic logic unit that co-operates with a stack arrangement. The invention may be applied in, for example, a multimedia product comprising a controller, in the form of a processor, for providing control data to various functional units.
BACKGROUND OF THE INVENTION
An arithmetic logic unit (ALU) typically carries out an operation on two input data, also called operands, so as to obtain an output data. The operation which the ALU carries out is generally defined by an instruction, also called micro code, in the form of a string of bits. The instruction may cause the ALU to carry out an arithmetic operation, for example, an addition: Z=X+Y; X and Y representing the input data and Z the output data. The instruction may also cause the ALU to carry out a logical operation, for example, an AND, OR, NAND or NOR function.
The ALU may co-operate with a stack. A stack is an assembly of storage elements, each storage element capable of containing data. Input data which are soon to be processed by the ALU are temporarily stored in the stack. An output data from the ALU may be temporarily stored in the stack too. A stack pointer generally indicates the storage element which constitutes the top-of-stack. A data which is placed on the stack is generally written into the top-of-stack and a data which is removed from the stack is generally read from the top-of-stack too. The writing and reading of data into and from the stack will be referred to as pushing and popping hereinafter. Generally, input data for the ALU are obtained by popping data from the stack and output data are stored by pushing data onto the stack. A processor which operates in this manner is referred to as a stack-based processor in the International Application published under number WO95/30954.
SUMMARY OF THE INVENTION
It is an object of the invention to allow a reduction of cost.
The invention takes the following aspects into consideration. Basically, in a stack-based processor, two types of operations are carried out. First of all, the ALU carries out arithmetic and logic operations. Secondly, the stack is manipulated so as to apply desired input data to the ALU.
It is possible to define a specific instruction for each different arithmetic and logic operation and for each different stack manipulation. In that case, the stack-based processor can be programmed to process data, for example, by means of the following sequence of instructions. First of all, a stack-manipulation instruction which causes the stack to apply desired data to the ALU, for example, a pop instruction. Secondly, an instruction which causes the ALU to carry out an arithmetic or logic operation, for example, an addition. Thirdly, a stack-manipulation instruction which causes the result of the arithmetic or logic operation to be stored into the stack, for example, a push instruction.
The number of different arithmetic logic operations may be appreciable greater than the number of different stack manipulations, or vice versa. This implies that an instruction which defines a stack manipulation can be coded with fewer bits than an instruction which defines an arithmetic or logic operation, or vice versa. That is, an instruction that defines a stack manipulation can be shorter than an instruction that defines an arithmetic logic operation, or vice versa. Coding different types of operation with instructions of variable length has the advantage that a relatively small memory will be sufficient for storing a set of instructions, i.e. a program.
However, it will generally require relatively expensive hardware in order to make a processor suitable for carrying out instructions of variable length. These costs will generally outweigh the cost advantage of a relatively small memory for storing instructions. It will thus be generally more cost-efficient if all instructions have a fixed length. Nevertheless, in that case, the memory for storing these instructions will be used inefficiently. For example, let it be assumed that there are 16 different arithmetic logic operations and 4 different stack manipulations. This implies that an instruction that defines a stack manipulation could be coded with two bits less than an instruction that defines an arithmetic or logic operation. In effect, two memory bits are wasted per stack-manipulation instruction.
According to the invention, a processor is arranged to execute instructions which include a stack control field and an opcode field for controlling the stack arrangement and the arithmetic logic unit, respectively.
Accordingly, it is possible to define, in a single instruction, an arithmetic or logic operation as well as a stack manipulation. Consequently, such instructions can have a fixed length while, for substantially each instruction, it holds that all the bits that form the instruction influence in one way or the other an operation that is carried out in the processor. Consequently, a set of such instructions will comprise very few bits, or even none at all, that do not influence data-processor operations. Consequently, it will require a smaller memory to store a set of such instructions compared with a set of instructions of fixed length in which there are separate instructions for arithmetic and logic operations, on the one hand, and stack manipulations, on the other hand. Consequently, the inventions allows a reduction of cost.
These and other aspects of the invention are apparent from and will be elucidated in the description hereinafter with reference to drawings.
REFERENCES:
patent: 5043870 (1991-08-01), Ditzel et al.
patent: 5522051 (1996-05-01), Sharangpani
patent: 5963744 (1999-10-01), Slavenberg et al.
patent: 6134573 (2000-10-01), Henry et al.
patent: WO 94/15280 (1994-07-01), None
patent: WO9530954 (1995-11-01), None
patent: 9821655 (1998-05-01), None
Nakamura et al., “Real-Time Multimedia Data Processing Using VLIW Hardware Stack Processor”,Proceedings of the Joint, Apr. 1-3, 1997.*
Workshop on Parallel and Distributed Real-Time Systems, 1997, IEEE, pp. 296-301.
Koninklijke Philips Electronics , N.V.
Treat William M.
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