Single event upset mitigation

Details Single event upset mitigation Single event upset mitigation

2010-02-18

2010-12-14

Chang, Daniel D (Department: 2819)

Electronic digital logic circuitry

Reliability

Redundant

C326S040000, C326S046000, C714S725000

Reexamination Certificate

active

07852107

ABSTRACT:
In one embodiment of the invention, a method is provided for protecting against single event upsets of a circuit in programmable logic. Configuration memory cells of the programmable logic are configured to implement first and second copies of the circuit. In response to detecting a single event upset of one of the configuration memory cells, an address of the one of the configuration memory cells is determined. The one of the first and second copies of the circuit in which the single event upset occurred is determined from the address of the one of the configuration memory cells. The output from the one of the first and second copies of the circuit in which the single event upset did not occur is selected as an output of the circuit.

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