Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2001-11-27
2003-04-29
Lee, Benny (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S258000
Reexamination Certificate
active
06556081
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a power amplifiers, and, more particularly, to a single-ended, ultra low voltage CMOS class AB power amplifier architecture, having a common-mode feedback quiescent current control circuit.
BACKGROUND OF THE INVENTION
Applying simple topologies in order to obtain high efficiency is the key design technique for future analog cells in mixed-mode very-large-scale integration (VLSI) circuits. As the reduction in feature size of complementary metal-oxide-semiconductor (CMOS) processes continues steadily, supply voltage must be reduced while higher integration density enforces lower power consumption per cell. The low supply voltage complicates the analog cell design, yielding often more complex circuit solutions, which may even result in a performance reduction. The only way for analog cells to keep up with digital performance and supply-voltage reduction is by using very efficient topologies that combine low-voltage operation with high power efficiency and small die area.
Operational amplifiers (Op-amps) must have linear transfer characteristics, stable frequency response, insensitivities to process variations, and very high input impedance to interface with CMOS circuitry.
Existing op-amps can either operate well below 3 V but use a complex structure or employ a simple two stage topology but require a supply voltage of the order of 2.7-3.0 V depending on the technology. In general, power op-amps must be capable of supplying high power to a load coupled thereto at low D.C. bias voltages. Low resistive type loads, such as a speaker having a 4, 6, or 8 &OHgr; impedance, and low voltage power supply, such as those within the range of 1.5-1.8 V present further complicate the design of conventional differential and single-ended op-amps. The low voltage of the power supply imposes one part of the difficulty, while the low resistivity of the load imposes another. To supply the amount of current necessary for a low resistive load, large output transistors are implemented with the conventional op-amp design. The problem that must be addressed, however, is the control of the D.C. quiescent current associated with CMOS amplifiers having large output transistors that introduce large parasitic capacitance. The high load currents and large dimensions of output transistors in a conventional amplifier imply a high sensitivity of quiescent current to process variations and biasing. As a result, small deviations in the gate voltages of output transistors can lead to quiescent currents that greatly exceed desired requirements.
There are many ways to control the quiescent current of an output stage within an amplifier but these may depend upon temperature or different processing parameters. The preference is to set the quiescent current to some fixed current within the micro to milli-amps range.
There are two main categories of output stage quiescent current control in class AB style amplifiers. These are feedforward and feedback. Feedforward styles are less obtrusive to the operation of the main amplifier than feedback styles, but feed forward requires a large voltage headroom to bias all the pertinent transistors correctly. For designs having power supply voltages within the range from 1.5V to 1.8V or below, feed-forward techniques are not acceptable. Feedback styles offer lower voltage capabilities, but generally suffer from some sort of stability issues. At the very least serious transient settling effects exist that could affect the performance of the amplifier.
Thus, there exists a need for an ultra low voltage CMOS class AB power amplifier architecture, having a common-mode feedback quiescent current control circuit. The power amplifier should also have high gain, inherent stability and simplicity of implementation which have proved difficult in the past to achieve.
SUMMARY OF THE INVENTION
To address the above-discussed deficiencies of the power amplifiers having feedforward quiescent current control, the present invention teaches a single-ended, ultra low voltage class AB power amplifier architecture, having a common-mode feedback quiescent current control circuit. A first embodiment of the power amplifier having a differential input and a single output according to the present invention provides a power amplifier comprising an input gain stage having differential inputs and differential outputs, an output gain stage and a quiescent current control circuit. The quiescent current control circuit acts as a high input impedance closed loop common mode feedback to derive a common mode feedback control signal from the differential outputs of the input gain stage to maintain a desired quiescent current within the output gain stage. The output gain stage, connected to the input gain stage, includes a pair of control transistors interfacing with the differential outputs of the input gain stage. The output gain stage provides an output for the power amplifier. An output stage bias reference circuit supplies a bias voltage level such that the common mode control signal supplied to the input gain stage is proportional to the difference between the differential output terminals and the bias voltage level.
The solution for the output stage quiescent current control is a common-mode feedback approach for a single-ended amplifier. Since a common-mode feedback circuit only operates on a common-mode signal, the main differential signal path through the amplifier has maximum integrity.
In an alternative embodiment, an error amplifier is used instead of the common-mode feedback circuit to control the quiescent current at a desired level. Given this embodiment the differential output leads of the input gain stage and the bias reference voltage connect to the error amplifier such that the difference between the average of the differential output voltages and the bias reference voltage set the quiescent current at the desired level.
Another embodiment includes the use of a folded cascode input stage substituting for the simplified input stage.
Advantages of this design include but are not limited to an amplifier that operates at a low voltage having a quiescent current control circuit that is not complex. Using the parasitic capacitance of the output stage transistors, the stability is improved over prior art approaches. Moreover, since the quiescent current control circuit is a common-mode feedback approach rather than a differential, there exists no conflicts in stability when the amplifier swings in voltage between two power supply voltage potentials.
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Brady III Wade James
Lee Benny
Mosby April M.
Nguyen Khanh Van
Tekecky, Jr. Frederick J.
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