Single-ended sense amplifier for dynamic memory array

Details Single-ended sense amplifier for dynamic memory array Single-ended sense amplifier for dynamic memory array

1985-06-04

1986-11-25

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

365207, 365210, G11C 700, G11C 1140

Patent

active

046253009

ABSTRACT:
A semiconductor memory device having an array of rows and columns of dynamic one-transistor memory cells uses a single-ended differential sense amplifier connected to each whole column line, rather than separately to column line halves. A bistable circuit with cross-coupled driver transistors has one side connected to the column line by a first coupling transistor which turns off as the row line goes high to trap a fixed reference voltage, then the other side is connected to the column line by a second coupling transistor which turns on after the column line has settled out. This column line voltage is related to whether a 1 or 0 is stored. The time needed to precharge the column line is short because two halves need not be precharged from different levels, and so the memory cycle time is short. Also, the device is less susceptible to errors due to alpha particles because a change of the bit line voltage equally effects both inputs to a sense amplifier.

REFERENCES:
patent: 3969706 (1976-07-01), Proebsting et al.
patent: 3983545 (1976-09-01), Cordaro
patent: 4003034 (1977-01-01), Au
patent: 4004284 (1977-01-01), Heeren
Krick, "Self-Differential Sensing of MNOS Memory Arrays", IBM Technical Disclosure Bulletin, vol. 16, No. 12, May 1974, pp. 4098-4099.
Krick, "Dual Level Sense Scheme for Composite Insulator Memory Arrays", IBM Tech. Disc. Bulletin, vol. 17, No. 6, Nov. 1974, pp. 1811-1813.
Coe et al, "Enter the 16,384-Bit RAM", Electronics, Feb. 19, 1976, pp. 116-121.

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