Single-ended CMOS sense amplifier

Static information storage and retrieval – Read/write circuit – Differential sensing

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365189, 307530, G11C 1140

Patent

active

045983895

ABSTRACT:
A semiconductor dynamic read/write memory device having an array of rows and columns of one-transistor cells employs a single-ended sense amplifier connected to a whole column line, rather than a differential sense amplifier having two inputs connected to column line halves. The single-ended sense amplifier includes an input circuit responsive to a selected threshold voltage, and the output of the amplifier is coupled back to the column line. A dummy cell circuit applies a fixed charge to the column line, so the threshold is exceeded if the selected memory cell stores a 1, but not if a zero is stored.

REFERENCES:
patent: 4004284 (1977-01-01), Heeren
patent: 4270190 (1981-05-01), Jindra et al.
patent: 4434381 (1984-02-01), Stewart
Lambrechtse et al., "A 4096 Bit One Transistor per Bit RAM with Internal Timing and Low Dissipation", IEEE ISSCC Digest of Tech. Papers, Feb. 14, 1973, pp. 26-27.

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