Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-07-25
2000-05-30
Chaudhuri, Olik
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
438257, 438264, H01L 29788
Patent
active
060693800
ABSTRACT:
A Single Electron MOS Memory (SEMM), in which one bit of information is represented by storing only one electron, has been demonstrated at room temperature. The SEMM is a floating gate Metal-Oxide-Semiconductor (MOS) transistor in silicon with a channel width (about 10 nanometers) which is smaller than the Debye screening length of a single electron stored on the floating gate, and a nanoscale polysilicon dot (about 7 nanometers by 7 nanometers by 2 nanometers) as the floating gate which is positioned between the channel and the control gate. An electron stored on the floating gate can screen the entire channel from the potential on the control gate, and lead to: (i) a discrete shift in the threshold voltage; (ii) a staircase relation between the charging voltage and the shift; and (iii) a self-limiting charging process. The structure and fabrication of the SEMM is well adapted to the manufacture of ultra large-scale integrated circuits.
REFERENCES:
patent: 4272744 (1981-06-01), Boettcher
patent: 4581621 (1986-04-01), Reed et al.
patent: 5093699 (1992-03-01), Weichoid et al.
patent: 5446299 (1995-08-01), Acovic et al.
patent: 5493140 (1996-02-01), Iguchi
patent: 5508543 (1996-04-01), Hartstein et al.
patent: 5581102 (1996-12-01), Kusumoto
patent: 5670790 (1997-09-01), Katoh et al.
patent: 5740104 (1998-04-01), Forbes
Lingjie Guo et al., "A Silicon Single-Electron Transistor Memory Operating at Room Temperature," Science, vol. 275, p. 649-651(Jan. 31, 1997).
Kazuo Yano et al., "Room Temperature Single-Electron Memory," IEEE Transactions on Electron Devices, vol. 41, No. 9, p. 1628-1637 (Sep. 1994).
Sandip Tiwari et al., "A Silicon Nanocrystals Based Memory," App. Phys. Lett., vol. 68 (10), p. 1377-1379 (Mar. 4, 1996).
P. B. Fischer et al., "10 nm Electron Beam Lithography and Sub-50 nm Overlay Using a Modified Scanning Electron Microscope," Appl. Phys. Lett., vol. 62 (23), p. 2989-2991 (Jun. 7, 1993).
Paul B. Fischer et al., "10 nm Si Pillars Fabricated Using Electron-beam Lithography, Reactive Ion Etching, and HF Etching," J. Vac. Sci. Technol., vol. B 11(6), p. 2524-2527 (Nov./Dec. 1993).
Effendi Leobandung et al., "Single Electron and Hole Quantum Dot Transfers Operating Above 110 K," J. Vac. Sci. Technol., vol. B 13 (6), p. 2865-2868 (Nov./Dec. 1995).
S. M. Sze, "Physics of Semiconductor Devices," 2nd Ed., John Wiley & Sons, p. 496-506 (1981).
Philip Yam, "Dot's Incredible," Scientific American, pp. 14-15 (Nov. 1993).
Peter Kauffner, "Professor's Innovation Captures Attention," The Minnesota Daily, vol. 98, Issue 74, p. 1, 9 (Feb. 5, 1997).
H.I. Liu et al., "Self-Limiting Oxidation for Fabricating sub5-nm Silicon Nanowires," Applied Phys. Let., vol. 64, p. 1383 (Mar. 14, 1994).
J.R. Davis, "Instabilities in MOS Devices," Gorden & Breach Science Publishers, pp. 20-21 (1980).
Stephen Gasiorowicz, "Quantum Physics," John Wiley & Sons, pp. 60-64, 78-79, 151-152 (1974).
Stephen Y. Chou et al., "Imprint Lithography With 25-Nanometer Resolution," Science, vol. 272, p. 85 (Apr. 5, 1996).
D. Ali & H. Ahmed, "Coulomb Blockade in a Silicon Tunnel Junction Device," Appl. Phys. Lett., vol. 64 (16), p. 2119 (Apr. 18, 1994).
Y. Takahashi et al., "Conductance Oscillations of a Si Single Electron Transistor at Room Temperature," IEDM 94, p. 938 (33.7.1) (1994).
E. Leobandung et al., "Observation of Quantum Effects and Coulomb Blockade in Silicon Quantum-Dot Transistors at Temperatures Over 100 K," Appl. Phys. Lett., vol. 67 (7), p. 938 (Aug. 14, 1995).
E. Leobandung et al., "Silicon Single Hole Quantum Dot Transistors for Complementary Digital Circuits," IEDM 95, p. 367 (15.2.1) (1995).
Chou Stephen Y.
Guo Lingjie
Leobandung Effendi
Chaudhuri Olik
Regents of the University of Minnesota
Weiss Howard
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