Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects
Reexamination Certificate
2000-02-04
2002-04-23
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
C438S931000
Reexamination Certificate
active
06376900
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to single crystal SiC, and more particularly to single crystal SiC which is used as a semiconductor substrate wafer for a high-temperature semiconductor element, an optical element, and a light-emitting element.
2. Description of the Prior Art
SiC (silicon carbide) is superior in heat resistance and mechanical strength, and also has good resistance to radiation. In addition, it is easy to perform the valence control of electrons and holes by doping an impurity. Moreover, SiC has a wide band gap (for example, single crystal 6H-SiC has a band gap of about 3.0 eV, and single crystal 4H-SiC has a band gap of about 3.26 eV). Therefore, it is possible to realize a high temperature, a high frequency, a withstand voltage, and a high resistance to environments which cannot be realized by existing semiconductor materials such as Si (silicon) and GaAs (gallium arsenide). For these reasons, single crystal SiC receives attention and is expected as a semiconductor material for a next-generation power device.
This kind of single crystal SiC is subjected to various kinds of treatments such as epitaxial growths, whereby the single crystal SiC is used as a substrate or the like in case that plural IC chips are produced on a wafer simultaneously.
As a method of producing the single crystal SiC which is used as the substrate wafer for producing a semiconductor device such as IC chip, known conventionally are the Achison method, the sublimation and recrystallization method (or the Raileygh method), and the improved sublimation and recrystallization method (or the improved Raileygh method). In the Achison method, a seed crystal substrate is heated by a high frequency electrode from the outer periphery thereof, whereby nuclei occur in the center portion of the seed crystal substrate so as to develop plural crystal growths which are spiral shaped around the seed crystal substrate. In the sublimation and recrystallization method (or the Raileygh method), SiC powder as a material is sublimated inside a graphite crucible so as to produce a sublimation gas, whereby the sublimation gas is recrystallized on a side of lower temperature portion inside of the graphite crucible. Furthermore, in the improved sublimation and recrystallization method (or the improved Raileygh method), a seed crystal is arranged on a side of the lower temperature portion inside the graphite crucible, and the gas sublimated from the SiC as the material is diffused to be transported within a closed space whereby it is recrystallized on the seed crystal whose temperature is set to be low.
In the Achison method of the above-described conventional production methods, however, a seed crystal substrate is heated over a long time period, whereby a single crystal is grown slowly, so that the crystal growth rate is very low. In addition, a large number of crystal nuclei are generated in an initial growth stage, and they propagate to an inner layer of the crystal as the crystal growth advances. Thus, it is not preferable in view of productivity and quality of the product to use the single crystal produced by the Achison method as semiconductor material such as IC. Therefore, as the production method of the single crystal SiC used for the semiconductor material, the Raileygh method and the improved Raileygh method are exclusively adopted.
However, in the single crystal SiC produced by the Raileygh method and the improved Raileygh method, which can accelerate the crystal growth, and enables the growth of a large size single crystal, many pinholes (whose number is substantially 100 pinholes/cm
2
in the current state) which have a diameter of several microns to dozens of microns are likely to remain in a growing crystal. Therefore, the single crystal SiC produced by the Raileygh method and the improved Raileygh method, has defects in view of quality. Such pin holes are called micropipe defects. Especially, in using it as the substrate wafer for fabricating the semiconductor device, many micropipes existing on the substrate wafer are fatal obstacles for fabricating the semiconductor device. In other words, in case of using the single crystal SiC produced by the Raileygh method and the improved Raileygh method as the substrate wafer, and forming an epitaxial layer on the single crystal SiC, the micropipes existing on the wafer are inherited to the epitaxial layer so as to be grown. As a result, a predetermined semiconductor device cannot be produced. Moreover, even if it can be forcedly produced, there is a problem wherein the necessary features of the semiconductor device itself cannot be obtained. This blocks a practical use of SiC which has superior characteristics as compared with other existing semiconductor materials such as Si and GaAs as described above.
SUMMARY OF THE INVENTION
The present invention has been conducted to address the above mentioned circumstances. It is an object of the present invention to provide extreme high-quality SiC which can be effectively used as a substrate wafer for fabricating a semiconductor device, in which the number of micropipes are few, and distortion in the neighborhood of the micropipes is decreased.
In order to achieve this object, single crystal SiC according to a first aspect of the present invention is characterized by having a structure of the single crystal SiC, in which single crystal SiC is formed on a single crystal SiC substrate via a single. crystal SiC layer which is substantially free from micropipes, and the number of micropipes per unit of area in the single crystal SiC substrate is less than that of micropipes per unit area in the single crystal SiC substrate. Single crystal SiC according to a second aspect of the present invention is characterized in that an upper layer of single crystal SiC substrate is formed as a single crystal SiC layer which is substantially free of the micropipes, and the number of micropipes per unit area in the upper layer of the single crystal SiC substrate is less than that of micropipes per unit area in a lower layer of the single crystal SiC substrate Additionally, single crystal SiC according to a third aspect of the present invention is characterized in that the number of micropipes per unit area is less than 50, and preferably less than 20 and it is formed so as to be practically used as substrate wafer for fabricating a semiconductor device.
The first and third aspects of the present invention as mentioned above, compared with the single crystal SiC produced by the Raileygh method and the improved Raileygh method, make it possible to obtain the high quality-single crystal SiC wherein the number of the micropipes per unit area is less, thereby decreasing the distortion in the neighborhood of the micropipes. In conventional single crystal SiC, a great number of micropipes have existed, thereby causing a fatal difficulty in producing a substrate wafer for fabricating a semiconductor device. Even if the substrate wafer is forcedly produced, the quality thereof deteriorates. Such conditions block a practical use of SiC, and especially the practical use of a substrate wafer for fabricating a semiconductor device. However, the present invention has an effect. In other words, the present invention makes the single crystal SiC according to the present invention practicable as a substrate wafer used for producing the semiconductor device. Furthermore, it has another effect of promoting practicability of the single crystal SiC which is superior in a high frequency, a withstand voltage, and a high resistance to environments which cannot be realized by existing semiconductor materials such as Si (silicon) and GaAs (gallium arsenide), and which is expected as the semiconductor material for power device.
Other objects and effects of the present invention will be clarified by the following description of preferred embodiments.
REFERENCES:
patent: 6153165 (2000-11-01), Tanino
patent: 6153166 (2000-11-01), Tanino
Maeda Toshihisa
Tanino Kichiya
Yamada Yoshimitsu
Hoang Quoc
Jones Tullar & Cooper P.C.
Nippon Pillar Packing Co. Ltd.
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