Single-chip memory system having a multiple bit line structure f

Static information storage and retrieval – Read/write circuit – Differential sensing

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365205, 327 56, G11C 700

Patent

active

057843244

ABSTRACT:
To make a memory system smaller, a memory system includes a plurality of memory cell arrays including a plurality of pairs of bit lines, a plurality of first data amplifiers for amplifying data of corresponding pairs of bit lines, a reference voltage circuit for outputting a reference voltage level, and a plurality of second amplifiers for receiving an output of the corresponding first data amplifier and the reference voltage level, for judging which voltage level is higher between the output of the corresponding first data amplifier and the reference voltage level, and for amplifying the voltage level being higher.

REFERENCES:
patent: 5483489 (1996-01-01), McClure
patent: 5526314 (1996-06-01), Kumar

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