Single chip controller-memory device including feature-selectabl

Details Single chip controller-memory device including feature-selectabl Single chip controller-memory device including feature-selectabl

1997-10-24

2000-01-25

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

711104, G06F 1316

Patent

active

06018793&

ABSTRACT:
A memory architecture 104 includes a plurality of arrays 200 of memory cells. Addressing circuitry 201 selects a cell of a selected one of arrays 201 for access while feature select circuitry 205 selects an access type to be performed to the selected cell. A first bus 207, 208, 209 exchanges a bit of data with the selected cell in response to the selection of a first access type. A second bus 207, 208, 209 exchanges a bit of data with the selected cell in response to the selection of a second access type.

REFERENCES:
patent: 5226142 (1993-07-01), Vegesna et al.
patent: 5305253 (1994-04-01), Ward
patent: 5355335 (1994-10-01), Katsuno
patent: 5854637 (1998-12-01), Sturges

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