Single chip clock control circuit operating independently of CPU

Details Single chip clock control circuit operating independently of CPU Single chip clock control circuit operating independently of CPU

1998-07-15

2000-04-25

Sheikh, Ayaz R.

Electrical computers and digital processing systems: support

Computer power control

Power conservation

713601, G06F 132

Patent

active

060556420

ABSTRACT:
It is an object to prevent peak power consumption occurring on transition from normal mode to a small power consumption mode. A control-signal generating circuit (4) controls an oscillation circuit (2) and control circuits (3A) and (3B) to realize three types of clock modes including the normal mode in which both of clocks (MC) and (PC) are supplied, a wait mode as a small power consumption mode in which only the clock (PC) is supplied and a stop mode as another small power consumption mode in which supply of both of the clocks (MC) and (PC) is interrupted. Control input signals (EI) and (SI) for instructing to control the control-signal generating circuit (4) are not allowed to pass through a CPU (5) and directly supplied from an ICU (6) in response to the external request signals (ERA) and (ERB). Since the transition to the small power consumption mode does not require the operation of the CPU (5), the peak power consumption can be prevented.

REFERENCES:
patent: 5546568 (1996-08-01), Bland et al.
patent: 5560017 (1996-09-01), Barrett et al.
patent: 5754883 (1998-05-01), Lim et al.
patent: 5878251 (1999-03-01), Hagiwara et al.

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