Single-burst-correction / double-burst-detection error code

Details Single-burst-correction / double-burst-detection error code Single-burst-correction / double-burst-detection error code

2007-07-24

2007-07-24

Chase, Shelly (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

Reexamination Certificate

active

10669512

ABSTRACT:
A method and apparatus for performing encoding and decoding of bit chain data packets conveying errors which do not spread on more than n bits, at very high speed. In one embodiment, a matrix of the corresponding Systematic code is built using p×p matrix blocks comprising elements of a galois field, generated by an irreducible generator polynomial of degree p, p being greater or equal to n.

REFERENCES:
patent: 4677623 (1987-06-01), Iwasaki et al.
patent: 5822336 (1998-10-01), Weng et al.
patent: 6836869 (2004-12-01), Wyland

Affiliated with

Also associated with

Rating

Single-burst-correction / double-burst-detection error code does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Single-burst-correction / double-burst-detection error code, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Single-burst-correction / double-burst-detection error code will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3757109