Simulation site placement for lithographic process models

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

active

07571418

ABSTRACT:
A method and system for performing the method are provided for designing a mask layout that includes selecting simulation sites for optical proximity correction (OPC) or mask verification, prior to fragmentation of shape edges. The primary simulation sites are selected based upon the influence of adjacent shapes, and then fragmentation is performed based on the primary simulation sites. Preferably, the simulation sites are selected by initial simulation within a region of influence of the vertices of mask shapes. The extrema of the resulting simulations are identified, and the intersection of a projection from the extrema to shape edges is used to define the primary simulation sites. Fragmentation of the edges may then be performed as long as the primary simulation sites thus selected are retained. The resulting simulation sites will allow the OPC engine to more effectively correct the shapes where the greatest influences will occur.

REFERENCES:
patent: 6453457 (2002-09-01), Pierrat et al.
patent: 6625801 (2003-09-01), Pierrat et al.
patent: 6872494 (2005-03-01), Hoshino
patent: 6918104 (2005-07-01), Pierrat et al.
patent: 2004/0133871 (2004-07-01), Granik et al.
patent: 2005/0138596 (2005-06-01), Medvedeva et al.
patent: 2006/0271905 (2006-11-01), Mukherjee et al.

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