Simulating multiported memories using lower port count memories

Details Simulating multiported memories using lower port count memories Simulating multiported memories using lower port count memories

2008-03-04

2008-03-04

Tung, Kee M. (Department: 2628)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Memory allocation

C345S559000, C345S536000

Reexamination Certificate

active

10889730

ABSTRACT:
An apparatus and method for simulating a multiported memory using lower port count memories as banks. A portion of memory is allocated for storing data associated with a thread. The portion of memory allocated to a thread may be stored in a single bank or in multiple banks. A collector unit coupled to each bank gathers source operands needed to process a program instruction as the source operands output from one or more banks. The collector unit outputs the source operands to an execution unit when all of the source operands needed to process the program instruction have been gathered.

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