Simplified method of forming self-aligned vias in a semiconducto

Details Simplified method of forming self-aligned vias in a semiconducto Simplified method of forming self-aligned vias in a semiconducto

1999-08-20

2000-06-27

Smith, Matthew

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438583, 438395, 257374, H01L 214763

Patent

active

060806540

ABSTRACT:
High density, multi-metal layer semiconductor devices are formed with self-aligned vias and reliable interconnection patterns employing photolithography without the use of a photomask. Embodiments include modulating the amount of energy reflected into an overlying photoresist layer from underlying components to effect differential exposure of the photoresist layer.

REFERENCES:
patent: 5741626 (1998-04-01), Jain et al.
patent: 5869395 (1999-02-01), Yim
patent: 5879866 (1999-03-01), Starikov et al.

Affiliated with

Also associated with

Rating

Simplified method of forming self-aligned vias in a semiconducto does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Simplified method of forming self-aligned vias in a semiconducto, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Simplified method of forming self-aligned vias in a semiconducto will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1784217