Simplified hole interconnect process

Details Simplified hole interconnect process Simplified hole interconnect process

1997-01-22

1999-02-09

Everhart, Caridad

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438666, 438700, 438948, 438640, 438673, H01L 21469

Patent

active

058693955

ABSTRACT:
The subject invention is directed to a method for producing semiconductor wafers using a simplified hole interconnect process. These wafers include at least one interconnect layer located on a contact or via layer. As contrasted with the semiconductor wafers produced according to the prior art method described above, the contact or via layer of this invention includes a plurality of patterned openings formed therein which are in substantial alignment without offset with each other.

REFERENCES:
patent: 4758305 (1988-07-01), Bonifield et al.
patent: 5288660 (1994-02-01), Hua et al.
patent: 5380621 (1995-01-01), Dichiara et al.
patent: 5691238 (1997-11-01), Avanzino et al.
Carter C. Kaanta, et al. "Dual Damascene:A ULSI Wiring Technology"Jun. 11-12, 1991 VMIC Conference, Proc. of the 8th International VMIC Conf. IEEE, Calif.

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