Silylation method for reducing critical dimension loss and resis

Details Silylation method for reducing critical dimension loss and resis Silylation method for reducing critical dimension loss and resis

1999-08-25

2000-08-22

Chaudhari, Chandra

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438624, 438638, 438700, H01L 2144

Patent

active

061071773

ABSTRACT:
A method for reducing critical dimension loss and resist loss dimensions during etching includes providing a dielectric layer having an anti-reflection layer formed thereon and patterning a resist layer on the anti-reflection layer. The resist layer is exposed to an agent including silicon, and the agent is reacted with the resist to form a silylation region on exposed surfaces of the resist layer. The anti-reflection layer is etched by employing the silylation regions as an etch mask wherein the silylation regions have a greater resistance to etching than the antireflection layer and the resist layer.

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