Metal treatment – Barrier layer stock material – p-n type – With recess – void – dislocation – grain boundaries or channel...
Patent
1993-05-13
1995-04-04
Chaudhuri, Olik
Metal treatment
Barrier layer stock material, p-n type
With recess, void, dislocation, grain boundaries or channel...
148 33, 437 10, 437 12, 437248, 117 2, H01L 21324
Patent
active
054034060
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
The present invention generally relates to the processes for the fabrication of semiconductor material substrates, especially the so-called silicon "slices" or wafers, for the manufacture of electronic components. More particularly, the present invention relates to a process for the treatment of silicon wafers under conditions suitable for the control of the concentration and of the distribution profile of the "gettering" or internal trapping sites.
As is known, single crystal silicon, which is the starting material for most processes for the fabrication of semiconductor electronic components, is commonly prepared with the so-called Czochralski process wherein a single seed crystal is immersed into molten silicon and then grown by slow extraction. As molten silicon is contained in a quartz crucible, it is contaminated with various impurities, among which mainly oxygen. At the temperature of the silicon molten mass, oxygen comes into the crystal lattice until it reaches a concentration determined by the solubility of oxygen in silicon at the temperature of the molten mass and by the actual segregation coefficient of oxygen in solidified silicon. Such concentrations are greater than the solubility of oxygen in solid silicon at the temperatures typical for the processes for the fabrication of integrated circuits. Therefore, as the crystal grows from the molten mass and cools, the solubility of oxygen in it decreases rapidly, whereby in the resulting slices of wafers, oxygen is present in supersaturated concentrations. As it is in supersaturated concentrations, the subsequent thermal treatment cycles of the wafers cause the precipitation of oxygen.
The precipitation of oxygen can cause useful effects and harmful effects. The useful effects are connected with the capability of oxygen precipitates (and of the "defects" connected thereto) to trap the undesired metal impurities that could subsequently come into contact with the wafer during the subsequent manufacture for the fabrication of the electronic component and compromise the performance of the latter. The harmful effects derive from the fact that such precipitates themselves will be contamination agents if they are situated in the active region of the wafer, where, on the contrary, a very high purity for the fabrication e.g. of an integrated circuit is necessary.
Over the years, various schemes have been suggested for carrying out the treatment of silicon wafers in such a manner that the active region, which occupies a depth of a few microns from the surface of the wafer, is comparatively devoid of the aforementioned "defects", whereas the remaining thickness of the wafer has a density of such defects sufficiently high for an effective trapping of the undesired metal impurities.
Such techniques are known as trapping or "intrinsic" gettering techniques and the region devoid of defects close to the surface of the wafer is named the denuded zone.
SUMMARY OF THE INVENTION
The object of the present invention is to indicate a process for controlling the concentration of the trapping centres present in silicon wafers and, more particularly, for realizing the defect density profile necessary to achieve a good denuded zone and a good intrinsic trapping effect.
In more precise terms, a first aspect of the invention relates to the control of the level of precipitation of oxygen in silicon wafers. A second aspect relates to the control of the density profiled of oxygen precipitates, in such a manner that the peak of the profile can act as a trapping region distinct and far from the active region of the device. A third aspect relates, therefore, to the fabrication of controlled precipitation wafers having an effective denuded zone in correspondence with the active region of the device and a highly effective trapping zone in the remaining volume.
These objects are achieved according to the present invention by means of a process for the treatment of silicon slices or wafers intended for use in the fabrication of integrated circuit electro
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Falster Robert
Ferrero Giancarlo
Fisher Graham
Olmo Massimiliano
Pagani Marco
Chaudhuri Olik
Horton Ken
MEMC Electronic Materials SpA
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