Silicon wafer and process for the heat treatment of a...

Details Silicon wafer and process for the heat treatment of a... Silicon wafer and process for the heat treatment of a...

2006-03-22

2010-11-09

Kunemund, Robert M (Department: 1714)

Single-crystal, oriented-crystal, and epitaxy growth processes;

Processes of growth with a subsequent step of heat treating...

C117S004000, C117S008000, C117S013000, C117S213000, C117S217000

Reexamination Certificate

active

07828893

ABSTRACT:
A silicon wafer having no epitaxially deposited layer or layer produced by joining to the silicon wafer, with a nitrogen concentration of 1·1013-8·1014atoms/cm3, an oxygen concentration of 5.2·1017-7.5·1017atoms/cm3, a central thickness BMD density of 3·108-2·1010cm−3, a cumulative length of linear slippages ≦3 cm and a cumulative area of areal slippage regions ≦7 cm2, the front surface having <45 nitrogen-induced defects of >0.13 μm LSE in the DNN channel, a layer at least 5 μm thick, in which ≦1·104COPs/cm3with a size of ≧0.09 μm occur, and a BMD-free layer ≧5 μm thick. Such wafers may be produced by heat treating the silicon wafer, resting on a substrate holder, a specific substrate holder used depending on the wafer doping. For each holder, maximum heating rates are selected to avoid formation of slippages.

REFERENCES:
patent: 5935320 (1999-08-01), Graef et al.
patent: 6065615 (2000-05-01), Uchiyama et al.
patent: 6133121 (2000-10-01), Tsunashima et al.
patent: 6197606 (2001-03-01), Polignano et al.
patent: 6350314 (2002-02-01), von Ammon et al.
patent: 7037797 (2006-05-01), Shooshtarian et al.
patent: 2004/0040632 (2004-03-01), Oosterlaken
patent: 2006/0278157 (2006-12-01), Seuring et al.
patent: 0 829 559 (1998-03-01), None
patent: 1 081 254 (2001-03-01), None
patent: 1 087 042 (2001-03-01), None
patent: 1 615 261 (2006-01-01), None
patent: 2 273 551 (1994-06-01), None
patent: 2003109964 (2003-04-01), None
patent: WO 2004/090967 (2004-10-01), None
T. Müller et al., Modeling and Experimental Verification of the 300 mm Ar Anneal Process, Semiconductor Silicon 2002, 9th International Symposium.
H. R. Huff, L. Fabry and S. Kishino (Eds.), Argon-Annealed 300 mm Wafers Complementing PP-Epitaxial Layers, The Electrochemical Society Proceedings vol. 2002-2, 194-201.
H. D. Chiou et al., Effects of Oxygen and Nitrogen on Slip in C2 Silicon Wafers, VLSI Science and Technology, ECS, Pennington, 59, 1984.
A. Karoui, F. Sahtout, F. Karoui, G. A. Rozgonyi, D. Yang, Journal of Applied Physics, 96, 2004, p. 3255.
A. Karoui, G. A. Rozgonyi, Journal of Applied Physics, 96, 2004, p. 3264.

Affiliated with

Also associated with

Rating

Silicon wafer and process for the heat treatment of a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Silicon wafer and process for the heat treatment of a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Silicon wafer and process for the heat treatment of a... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4152101