Silicon wafer and manufacturing method thereof

Details Silicon wafer and manufacturing method thereof Silicon wafer and manufacturing method thereof

2006-10-17

2006-10-17

Kunemund, Robert (Department: 1722)

Single-crystal, oriented-crystal, and epitaxy growth processes;

Processes of growth from liquid or supercritical state

Having pulling during growth

C117S014000, C117S015000, C117S017000, C117S018000, C117S020000, C117S932000, C423S344000

Reexamination Certificate

active

07122082

ABSTRACT:
A silicon wafer wherein stacking fault (SF) nuclei are distributed throughout the entire in-plane direction, and the density of the stacking fault nuclei is set to a range of between 0.5×108cm−3and 1×1011cm−3.

REFERENCES:
patent: 6174364 (2001-01-01), Yamanaka et al.
patent: 6409827 (2002-06-01), Falster et al.
patent: 6521316 (2003-02-01), Lee et al.
patent: 6562123 (2003-05-01), Falster et al.
patent: 6632278 (2003-10-01), Falster et al.
patent: 6849901 (2005-02-01), Falster
patent: 6858307 (2005-02-01), Vornokov et al.
patent: 2002/0100410 (2002-08-01), Kim et al.
patent: 2003/0106484 (2003-06-01), Fusegawa et al.
patent: 2001-156074 (2001-06-01), None
patent: WO 98/38675 (1998-09-01), None

Affiliated with

Also associated with

Rating

Silicon wafer and manufacturing method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Silicon wafer and manufacturing method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Silicon wafer and manufacturing method thereof will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3626604