Silicon semiconductor substrate and process for producing...

Single-crystal – oriented-crystal – and epitaxy growth processes; – Processes of growth from liquid or supercritical state – Having pulling during growth

Reexamination Certificate

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C117S013000, C117S020000, C117S032000

Reexamination Certificate

active

06805742

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a silicon semiconductor substrate obtained, by slicing, from a silicon single crystal which has been produced by pulling up the silicon single crystal by Czochralski method (CZ method) or magnetic field-applied Czochralski method (MCZ method) while controlling the cooling rate in a range from the coagulation temperature to the crystallising temperature of a single crystal and also controlling the concentration of nitrogen, the concentration of oxygen and the like. The invention also relates to a process for producing the same.
2. The Prior Art
As for the semiconductor substrates used to make devices such as semiconductor integrated circuits, semiconductor substrates obtained, by slicing, from a silicon single crystal grown by Czochralski method or magnetic field-applied Czochralski method are used mainly. Along with the recent improvement in the integration of devices, the presence of micro defects on the surface of a silicon semiconductor substrate or in the vicinity of the surface layer of a silicon semiconductor substrate causes operational failures of the device. A highly integrated device has such a fine structure that the pattern dimension thereof is 0.3 &mgr;m or less. Therefore, it is known that crystal defects of 0.1 &mgr;m in size also cause operational failures of the devices, thereby decreasing the yield of the production of the device.
As for the Grow-in defects during the growth of a silicon single crystal causing the reduction in the yield of a device, ring stacking faults (R-SF), dislocation clusters and the like occur in a zone where interstitial silicon is dominant, and cavity defects, namely void type defects (COP, LSTD, FPD) and AOP occur in a zone where voids are dominant. Because R-SF are driven out of a crystal when the crystal is grown in the CZ method or the MCZ method, most of the defects are void defects. As this void defect, COP (Crystal Originated Particles), a void of about 0.1 &mgr;m in size formed on a substrate just after the substrate is produced, has been attracting considerable attention. In a silicon single crystal grown by the CZ method or the MCZ method, the substance of this defect is considered to be a void in the crystal having an octahedral shape, which is estimated to cause pattern failures and structural destruction of the device.
In the production of a silicon single crystal by the CZ method or the MCZ method, quartz is used as the crucible. Oxygen eluted from the quartz crucible while pulling up a single crystal is moved by the flow and diffusion of the silicon melt and a large part of oxygen is evaporated as SiO gas from the surface of the melt. However, a part of the oxygen is incorporated into the crystal at high temperature, and the content of oxygen is supersaturated in the course of cooling the crystal, forming, in the crystal, micro-defects (BMD) of oxygen precipitates with a diameter of several hundreds nm or less and consisting of SiO
2
or SiO
x
. When a semiconductor which has been sliced from a single crystal is heat-treated before or in the course of producing electronic devices such as DRAM, the micro-defects of oxygen precipitates become extinct on the surface layer portion of the semiconductor substrate which is the active area of the electronic device and it is possible to increase the density of the micro-defects (BMD) in a deep zone far apart from the substrate surface and to increase the size of the oxygen precipitates.
However, when heavy metal impurities such as Cr, Fe, Ni and Cu are present on the surface portion of a silicon semiconductor substrate sliced from a silicon single crystal, this causes the deterioration of the characteristics of the device when producing an electronic device. It is therefore necessary to confine the heavy metal impurities at positions far apart from the active area of the device, namely from the surface layer portion. For this, by utilising BMD, heavy metal impurities such as Cr, Fe, Ni and Cu may be precipitated as a silicide on or in the vicinity of BMD by intrinsic gettering (IG), whereby a denuded zone (DZ) can be produced in the surface layer portion of the semiconductor substrate.
It is known that the depth of the denuded zone and the density of the micro-defect inside a semiconductor substrate depend upon the concentration of oxygen and the concentration of nitrogen in a silicon single crystal and the cooling rate during the growth of the single crystal. For this, the concentration of oxygen, the concentration of nitrogen and the cooling rate have been controlled to control the silicon defect-free layer and the density of the micro-defects in the inside.
A proposal for improving the denuded zone of a void-type defect and for improving the intrinsic gettering (IG) effect is presented in the publication of JP-A-2000-211995. In this publication, a silicon single crystal wafer is disclosed, wherein the depth of the defect-free surface layer is 2 to 12 &mgr;m and the C-mode non-defective ratio of TZDB (Time Zero Dielectric Breakdown), showing the evaluation of the voltage resistance quality of an oxide film is 90% or more. Also, it is disclosed in Claim
2
that the concentration of nitrogen in a silicon single crystal wafer is 1×10
12
to 1×10
15
atoms/cm
3
.
Further, it is disclosed in Claim
4
that the concentration of oxygen in the silicon single crystal wafer is 9 to 17 ppma, and in Claim
5
, that a silicon single crystal bar is grown in a manner that the cooling rate in a temperature range from 1150° C. to 1080° C. during the growth of the crystal is controlled to be in a range from 1.0 to 4.5° C./min. The following fact is shown in the example: it is necessary for the concentration of oxygen to be 10 ppma in an 8 inch silicon single crystal mirror surface wafer to satisfy the condition for the denuded zone (DZ) to actually extend to a depth up to 12 &mgr;m.
PROBLEMS TO BE SOLVED BY THE INVENTION
In the said known art, in a silicon single crystal wafer, a denuded zone is formed only to the depth of 12 &mgr;m (evaluation by COP number) by selecting an oxygen concentration of 9 to 17 ppma when the concentration of nitrogen is in the range from 1×10
12
to 1×10
15
atoms/cm
3
, and a silicon single crystal wafer with the depth of the denuded zone larger than 12 &mgr;m could not be produced.
In view of the aforementioned situation, the present invention is to provide a silicon semiconductor substrate in which the denuded zone (DZ) is deeper than 12 &mgr;m or the depth of the denuded zone of a void type defect is larger than 12 &mgr;m, the semiconductor substrate having a portion with locally increased nitrogen concentration which is produced by nitrogen segregation and exhibiting a signal strength two or more times the average signal strength at the depth of 12 &mgr;m or more below the surface thereof when measuring the concentration of nitrogen by secondary ion mass-spectroscopy, and having a high freedom in the production of electronic devices and a high device yield. The present invention is also to provide a process for producing the same.
In the present invention, the defect-free depth of a void type defect means the depth from the surface of a semiconductor substrate when the acceptable density is designed to be 2×10
5
or less in terms of the density of a COP (Crystal Originated Particle) with a size of 0.1 &mgr;m or more which appears by repeated washing using SC1 or the like. Also, the acceptable depth for withstanding voltage means the depth from the surface of a semiconductor substrate where the substrate withstands the voltage of 11 MV/cm or more at 100 mA/cm
2
at a successful rate exceeding 90% in a TZDB (Time Zero Dielectric Breakdown) test.
In the present invention, the depth of the denuded zone is evaluated by the depth having both values of the depth of the void type defect and the acceptable depth for withstanding voltage.
The density of oxygen precipitates, expressed as BMD (bulk micro-defect) density, means the density of micro-defects

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