Silicon-on-insulator (SOI) electrostatic discharge (ESD)...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S360000, C257S361000

Reexamination Certificate

active

06462381

ABSTRACT:

TECHNICAL FIELD
The present invention generally relates to the manufacture of semiconductor devices, and, more specifically, relates to the manufacture of silicon-on-insulator (SOI) devices particularly well suited for use as an electrostatic discharge (ESD) protection device.
BACKGROUND ART
Traditional silicon-on-insulator (SOI) devices typically have a silicon substrate having a buried oxide (BOX) layer disposed thereon. An active region of the device is defined in portions of a silicon layer (also referred to as an active layer) disposed on the BOX layer. Therefore, the device is isolated from the substrate by the BOX layer. During operation, some SOI devices generate heat. For example, a diode used as an electrostatic discharge (ESD) protection device will generate heat when conducting electrons between a protected node and a voltage potential (e.g., ground or Vss). During such an event, the heat generated by the ESD diode is not readily dissipated which may lead to failure of the ESD diode. Therefore, there exists a need in the art for dissipating heat generated from an SOI device, and particularly from an ESD protection device fabricated as part of an SOI wafer.
SUMMARY OF THE INVENTION
According to one aspect of the invention, the invention is an electrostatic discharge (ESD) protection device for a silicon-on-insulator (SOI) integrated circuit having a silicon substrate with a buried oxide layer disposed thereon and an active layer disposed on the buried oxide layer having active regions defined by isolation trenches. The ESD protection device formed on the SOI integrated circuit and has an anode and a cathode formed within one of the active regions and coupled respectively to a first and a second node; and a filled backside contact opening disposed under and in thermal contact with at least one of the anode or the cathode, the backside contact opening traversing the buried oxide layer to thermally couple the one of the active regions and the substrate.
According to another aspect of the invention, the invention is a method of fabricating an electrostatic discharge (ESD) protection device for a silicon-on-insulator (SOI) integrated circuit having a silicon substrate with a buried oxide layer disposed thereon and an active layer disposed on the buried oxide layer having active regions defined by isolation trenches. The method includes the steps of forming an anode and a cathode within one of the active regions and coupling the anode and the cathode respectively to a first node and second node; and forming a backside contact disposed under and in thermal contact with at least one of the anode or the cathode, the backside contact opening traversing the buried oxide layer and filled to thermally couple the one of the active regions and the substrate.
According to another aspect of the invention, the invention is a method of fabricating an electrostatic discharge (ESD) protection device for a silicon-on-insulator (SOI) integrated circuit having a silicon substrate with a buried oxide layer disposed thereon and an active layer disposed on the buried oxide layer having active regions defined by isolation trenches. The method includes the steps of implanting a first portion of one of the active regions with dopant to form an anode and implanting a second portion of the one of the active regions with dopant to form a cathode; depositing a resistor-protect mask on a junction of the anode and the cathode, the resistor-protect mask defining a silicide region; forming a silicide layer in the silicide region defined by the resistor-protect mask; and forming a backside contact opening disposed under and in thermal contact with at least one of the anode or the cathode, the backside contact opening traversing the buried oxide layer and filled to thermally couple the one of the active regions and the substrate.


REFERENCES:
patent: 5399507 (1995-03-01), Sun
patent: 5773326 (1998-06-01), Gilbert et al.
patent: 5889293 (1999-03-01), Rutten et al.
patent: 6107125 (2000-08-01), Jaso et al.
patent: 6274908 (2001-08-01), Yamaguchi et al.

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