Silicon nitride--TEOS oxide, salicide blocking layer for deep su

Details Silicon nitride--TEOS oxide, salicide blocking layer for deep su Silicon nitride--TEOS oxide, salicide blocking layer for deep su

1998-07-15

2000-02-15

Bowers, Charles

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438299, 438303, 438655, H01L 2146

Patent

active

060252677

ABSTRACT:
A method for forming self-aligned, metal silicide, (salicide), layers, on polysilicon gate structures, and on source/drain regions, located in a first region of a semiconductor substrate, while avoiding the salicide formation, on polysilicon gate structures, and on source/drain regions, located in a second region of a semiconductor substrate, has been developed. A composite insulator shape, comprising an overlying silicon nitride layer, and an underlying TEOS deposited, silicon oxide layer, is used to block polysilicon, as well as silicon regions, in the second region of the semiconductor substrate, from salicide formation. Unwanted silicon oxide spacers, created on the sides of polysilicon gate structures, during the patterning of the composite insulator shape, is selectively removed using dilute hydrofluoric acid solutions.

REFERENCES:
patent: 5573980 (1996-11-01), Yoo
patent: 5665646 (1997-09-01), Kitano
patent: 5756391 (1998-05-01), Tsuchiaki
patent: 5786249 (1998-07-01), Dennison
patent: 5935875 (1999-08-01), Lee

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