Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-08-31
2003-10-28
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S077000, C257S215000, C257S235000, C257S249000, C257S262000, C257S288000, C257S328000, C257S341000, C257S342000
Reexamination Certificate
active
06639273
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a silicon carbide MOS semiconductor device, such as a field-effect transistor (hereinafter referred to as “MOSFET”) having a gate of metal-oxide-semiconductor structure, which device uses silicon carbide (hereinafter referred to as “SiC”) as a semiconductor material. The present invention also relates to a method for manufacturing such MOS semiconductor devices.
BACKGROUND OF THE INVENTION
SiC is a semiconductor material that has been highly expected to be used in power semiconductor devices or semiconductor devices for high-temperature use. Among various types of power semiconductor devices, those called MOSFET have particularly simple structures, and may be used in a considerably wide range of applications. Accordingly, more and more studies have been conducted on fabrication of MOSFET using SiC. Another reason for extensive development and studies of SiC MOSFET is that a silicon dioxide film is grown on SiC (hereinafter referred to as “SiO
2
film”) thereon through thermal oxidation, as in the case of silicon (hereinafter referred to as Si), and therefore the same process for manufacturing MOSFET using Si as a semiconductor material may be used for manufacturing SiC MOSFET. Some research groups or researchers including the inventor of the present invention have fabricated MOSFETs using SiC, and reported their characteristics.
The SiC MOSFET, however, suffers from an extremely low mobility of electrons in an inversion layer formed in its surface. SiC is known as having crystalline polymorphism, namely, SiC crystallizes into two or more forms having different structures. Single crystals of SiC currently available in the market include 6H—SiC and 4H—SiC, both of which are alpha-phase SiC in which a zinc-blend structure and a wurtzite structure are superposed on each other. Of these single crystals, 4H—SiC has a relatively higher electron mobility than 6H—SiC, and is thus more expected to be applied to power devices.
FIG. 10
is a cross-sectional view of a vertical MOSFET having a general DMOS structure. In
FIG. 10
, a p base region
12
is formed in a surface layer of an n drift layer
11
a
, and an n
+
source region
13
is formed in the p base region
12
. A gate electrode
16
is formed on a gate insulating film
15
, over a part of the surface of the p base region
12
that is interposed between the n
+
source region
13
and an exposed surface portion of the n drift layer
11
a
. Also, a source electrode
17
is formed in contact with surfaces of both the n
+
source region
13
and the p base region
12
a
, and a drain electrode
18
is formed in contact with the rear surface of an n
+
drain region
14
.
In the operation of the MOSFET as described above, when a positive voltage is applied to the gate electrode
16
, an inversion layer is induced in a surface layer of the p base region
12
right under the gate insulating film
15
, so that current flows between the source electrode
17
and the drain electrode
18
. If the positive voltage to the gate electrode
16
is removed, the inversion layer right under the gate insulating film
15
disappears, and a depletion layer spreads out, thus blocking current flow through the p base region
12
.
As described above, currently available SiC n-channel MOSFET suffers from a low mobility of electrons in its inversion layer. In a 6H—SiC MOSFET, for example, an inversion layer has electron mobility of about 70 cm
2
/V.s (as reported in Lipkin, L. A. and Palmour, J. W.: J. Electronic. Materials Vol. 25 (1996) p.909). In a MOSFET using 4H—SiC and fabricated under the same conditions, on the other hand, only a considerably low electron mobility, more specifically, 10 cm
2
/V.s or lower, can be obtained. In recent studies, the inventor and others found that the electron mobility of 4H—SiC MOSFET may be increased to 20 cm
2
/V.s at the most, even with various changes or improvements in the manufacturing process (as reported in IEEE Electron Device lett. Vol. 19 (1998), p.244).
It follows that the electron mobility of 4H—SiC devices is significantly lower than that of 6H—SiC devices, and even 6H—SiC devices need to provide a higher mobility. Thus, such semiconductor devices that take advantage of low resistance as an inherent property of SiC crystal have not yet been successfully fabricated.
To overcome the above problem, there has been reported some semiconductor devices called ACCUFET, wherein a low-concentration n-type layer is formed below a gate electrode, and an accumulation layer, rather than an inversion layer, is used as a conduction layer.
FIG. 11
is a cross-sectional view of a part of a planar-type ACCUFET proposed by Shenoy et al. (refer to Shenoy, P. M. and Baliga, B. J.: Materials Science Forum Vols. 264-268 (1998) p.993).
In the ACCUFET of
FIG. 11
, an n channel region
30
, rather than a p type region, is formed in a surface layer right under a gate insulating film
25
. When a positive voltage is applied to a gate electrode
26
, an accumulation layer is induced in a surface layer of the n channel region
30
right under the gate insulating film
25
, so that current flows between a source electrode
27
deposited on an n
+
source region
23
, and a drain electrode
28
deposited on the rear surface of an n
+
drain region
24
. When the voltage to the gate electrode
26
is removed, the accumulation layer right under the gate insulating film
25
disappears, and a depletion layer spreads out, thus blocking current flow through the accumulation layer. The ACCUFET using 6H—SiC as a semiconductor material provides an electron mobility of 81 cm
2
/V.s.
FIG. 12
is a cross-sectional view showing a part of another example of ACCUFET proposed by Hara (refer to Hara, K.: Materials Science Form Vols. 264-268 (1988) p.901). This example is a UMOSFET having a trench structure, and basically identical with the ACCUFET of
FIG. 11
as described above. In this example, too, an n channel region
40
in the form of an n type epitaxial layer is formed in the surface of the SiC substrate, to provide an accumulator layer. Upon application of a positive voltage to a gate electrode
36
, an accumulation layer is induced in the n channel region
40
, so that current flows between a source electrode
37
that contacts with an n
+
source region
33
, and a drain electrode
38
deposited on the rear surface of an n
+
drain region
34
.
The ACCUFET of FIG.
11
and the UMOSFET of
FIG. 12
, however, are typically depletion type (normally-on type) transistors in which current flows even when no voltage (0V) is applied to the gate electrode
26
,
36
. It is thus difficult to produce the above transistors to be of enhancement type (normally-off type), due to restrictions imposed on the structures of the devices.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide an normally-off type or enhancement type SiC MOS semiconductor device which has a high electron mobility of a channel region to assure a low ON-state resistance, and which can be easily manufactured. It is another object to provide a method for manufacturing such SiC MOS semiconductor devices.
To accomplish the above object, the present invention provides a silicon carbide n channel MOS semiconductor device, comprising: a semiconductor substrate comprising silicon carbide, the substrate including a p base region, an n
+
source region and an n
+
drain region; a gate insulating film formed on a surface of the p base region; a gate electrode provided on the gate insulating film; and first and second main electrodes that allow current to flow therebetween; wherein current flowing between the first and second main electrodes is controlled by controlling an electron concentration of an inversion layer that is induced in a surface layer of the p base region located under the gate insulating film when a positive voltage is applied to the gate electrode; and wherein the effective acceptor concentration in the vicinity of an interface between the
Fuji Electric & Co., Ltd.
Louie Wai-Sing
Pham Long
Rossi & Associates
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