Silicon carbide MOSFET having self-aligned gate structure and me

Details Silicon carbide MOSFET having self-aligned gate structure and me Silicon carbide MOSFET having self-aligned gate structure and me

1997-07-25

1999-10-05

Trinh, Michael

Semiconductor device manufacturing: process

Having diamond semiconductor component

438270, 438589, 438931, H01L 2100

Patent

active

059637919

ABSTRACT:
A SiC MOSFET having a self-aligned gate structure is fabricated upon a monocrystalline substrate layer, such as a p type conductivity .alpha.6H silicon carbide (SiC) substrate. An SiC n+ type conductivity layer is epitaxially grown on the substrate layer. A steep-walled groove is etched through the n+ SiC layer and partially into the p SiC layer at a location on the substrate where a MOSFET gate structure is desired. Subsequently, a thin layer of silicon dioxide and a layer of gate metal are successively deposited over the entire structure. The gate metal layer is deposited with sufficient thickness to substantially fill the groove. A layer of photoresist is applied to the entire surface of the gate metal layer. The photoresist and the underlying gate metal are then reactive ion etched down to the oxide layer, leaving gate metal remaining only in the groove. The gate metal and oxide layer form the self-aligned gate structure wherein the walls of the groove are automatically aligned with the edges of drain and source regions that are formed on either side of the groove.

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