Silicon carbide MOSFET having self-aligned gate structure

Details Silicon carbide MOSFET having self-aligned gate structure Silicon carbide MOSFET having self-aligned gate structure

1992-08-07

1998-03-10

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Specified wide band gap semiconductor material other than...

Diamond or silicon carbide

257 76, 257288, 257330, 257331, 257332, 257333, H01L 310256, H01L 310312, H01L 2976

Patent

active

057264635

ABSTRACT:
A SiC MOSFET having a self-aligned gate structure is fabricated upon a monocrystalline substrate layer, such as a p type conductivity .alpha.6H silicon carbide (SiC) substrate. An SiC n+ type conductivity layer, epitaxially grown on the substrate layer, includes a steep-walled groove etched through the n+ SiC layer and partially into the p SiC layer. The groove is lined with a thin layer of silicon dioxide which extends onto the n+ type conductivity layer. A filling of gate metal over the layer of silicon dioxide is contained entirely in the groove. The silicon dioxide layer includes a first window extending to the filling of gate metal in the groove, and second and third windows extending to the n+ type conductivity layer on either side of the groove, respectively. A gate contact extends through the first window to the filling of gate metal in the groove while drain and source contacts extend through the second and third window, respectively, to make contact with the n+ type conductivity layer in drain and source regions on either side of the groove.

REFERENCES:
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patent: 5170231 (1992-12-01), Fujii et al.
Harris, "Metal-Oxide-Semiconductor Capacitors on SiC", Solid State Electronics, vol. 19 pp. 103-105, Feb. 1976.
D. Brown, et al., "Unframed Contacts Using Refactory Metals", IEEE Electron Devices Letters, vol. EDL-6, No. 8, Aug. 1985, pp. 408 and 409.
D. Brown, "The Self-Registered MOSFET--A Brief Review", Solid State Technology, Apr. 1972, pp. 33-37 and 45.

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