Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1996-03-11
2001-02-20
Meier, Stephen D. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S402000, C257S077000
Reexamination Certificate
active
06191458
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to Integrated circuits, and, more particularly, to fabrication of integrated circuits with silicon carbide semiconductor material.
2. Description of the Related Art
Conventional integrated circuits have not been fabricated of silicon carbide (SiC) semiconductor materials. The use of SiC material in an integrated circuit (IC), however, would have a number of advantages. SiC material has a large bandgap of about three electron volts which provides a very low leakage current and thus would allow IC operation at very high temperatures (up to about 500° C.). Additionally, the thermal conductivity of SiC is much higher than silicon, so higher power densities could be accommodated with SiC circuits. Furthermore, the carrier saturation velocity of SiC is high (about twice as high as that of gallium arsenide), a factor which would allow construction of very high speed circuits when micron and sub-micron geometries are used.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide silicon carbide (SiC) integrated circuits (ICs) for a wide variety of applications, and a method of fabricating such circuits.
Another object of the present invention is to provide a SiC IC capable of amplifying low-level currents, such as those conducted in ultraviolet SiC photodetectors, and to achieve high gain with high reliability at high temperatures.
Another object is to provide an operational amplifier fabricated entirely as a SiC integrated circuit.
The foregoing objects are achieved, in part, by providing a SiC IC fabricated with depletion mode refractory metal metal-oxide-semiconductor field-effect transistors (MOSFETs) and resistors in the same thin SiC semiconductor layer of n type conductivity. A depletion mode MOSFET is used instead of an enhancement mode MOSFET because enhancement mode MOSFETs can exhibit poor reliability at high temperatures in SiC. An underlying SiC layer of p type conductivity can be used for turning the device off and for providing the proper back gate transconductance for integrated circuit applications. Isolation between devices is presently achieved by etching moats through the n type layer. Junction isolation with p type ion implantation could also be used. These MOSFETs and resistors can be interconnected in a wide variety of integrated circuits.
The resistors in the present invention of the SiC IC are fabricated differently than resistors in a silicon IC for the purpose of obtaining a substantially constant gain. When silicon is used, the resistors typically comprise polysilicon material overlying an oxide layer. Polysilicon load resistors exhibit a negative temperature coefficient. Typically polysilicon resistor values are reduced by a factor of three when the temperature is increased from 0° C. to 350° C. SiC MOSFET charge carrier mobility drops by a factor of two over the same temperature increase, which would result in a six-fold gain reduction. Thus a resistor which has a resistance value which increases with increasing temperature is required for offsetting the corresponding decrease in charge carrier mobility.
More specifically, according to a preferred embodiment of the invention, a silicon carbide (SiC) integrated circuit (IC) includes a first SiC layer doped to a first conductivity type overlaid with a second SiC layer doped to a second conductivity type. The second SiC layer has at least four regions more heavily doped to the second conductivity type than the remainder of that layer, with two of the higher doped regions comprising MOSFET electrodes and two of the higher doped regions comprising resistor electrodes. The second SiC layer has an isolation region between the MOSFET electrodes and the resistor electrodes. An oxide layer extends over the second SiC layer with at least a portion of the oxide layer positioned over a portion of the second SiC layer which is between the two MOSFET electrodes. One of the MOSFET electrodes comprises a source electrode and the other of the MOSFET electrodes comprises a drain electrode. A gate electrode is positioned over the oxide layer so as to overlie the portion of the second SiC layer between the two MOSFET electrodes, and coupling means are provided for electrically coupling one of the gate, source, and drain electrodes to one of the resistor electrodes.
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Brown Dale Marius
Kretchmer James William
Krishnamurthy Vikram Bidare
Michon Gerald John
Agosti Ann M.
Breedlove Jill M.
General Electric Company
Meier Stephen D.
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