Silicided shallow junction transistor formation and structure wi

Details Silicided shallow junction transistor formation and structure wi Silicided shallow junction transistor formation and structure wi

1997-12-06

1999-10-26

Hardy, David B.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257754, 257770, 438607, H01L 29861

Patent

active

059733721

ABSTRACT:
A method, and structure resulting therefrom, of forming a metal silicide at a shallow junction in a single crystal substrate without encroaching on the shallow junction by forming a metal layer on the substrate over the junction followed by forming a layer of a silicon material which reacts with the metal faster than the silicon in the single crystal substrate. Titanium is the preferred metal and amorphous silicon is the preferred silicon layer and is of a thickness to react with all of the titanium. The two layers are rapid thermal annealed to form titanium silicide. A second rapid thermal anneal is performed which converts the majority of the C49 phase of the titanium silicide to a less resistive and more conductive C54 phase and causes a silicon epitaxial layer to form between silicon substrate and the titanium silicide.

REFERENCES:
patent: 5225896 (1993-07-01), Van Roozendaal et al.
patent: 5416034 (1995-05-01), Bryant

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