Signaling of power modes over an interface bus

Details Signaling of power modes over an interface bus Signaling of power modes over an interface bus

1998-11-10

2001-07-03

Lee, Thomas (Department: 2782)

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral configuration

C710S018000, C713S300000, C713S310000, C713S320000

Reexamination Certificate

active

06256682

ABSTRACT:

BACKGROUND INFORMATION
1. Field of the Invention
This invention is generally related to power-up switch mechanisms in computer systems and more particularly to power-up switch circuits used in peripheral devices and with interface buses.
2. Description of Related Art
Various techniques for controlling electrical power supplied to a computer system have been developed over the years to provide the user with a convenient way to turn on and turn off the computer system. One recent innovation has been to equip a peripheral device such as a keyboard with a switch to control the supply of main power to the desktop computer. This allows the user to easily turn on and turn off the desktop computer while the main processing portion including the motherboard and disk drive is located farther than the user's hand can reach.
FIG. 5
shows such a prior art design.
FIG. 5
shows a keyboard
512
equipped with a normally open push-button switch
502
for controlling the power supply to the main processing portion. The conveniently located switch
502
is connected to a dedicated power-on wire
508
which is part of the Apple Desktop Bus™
510
(ADB) that couples the keyboard
512
to the processing portion
514
. The bus
510
also includes power, return and data wires that provide power to the keyboard from the main supply (not shown), and transmission of data representing keystrokes on the keyboard. The dedicated power-on wire
508
is not used for data transmission and is biased via a pull-up resistor
504
to a trickle power source. When the user presses the push-button switch
502
in the keyboard, the dedicated power-on wire is connected to common return signaling a desire to turn on or turn off the power. When the push-button switch is depressed again after main power has been turned on, the dedicated power-on wire is once again connected to the common return.
A problem with the prior art design in
FIG. 5
, however, is that a dedicated wire is required for controlling the power. Modern and future computer peripheral interface bus standards, however, do not always provide for a dedicated power-on wire. These include, for instance, the Universal Serial Bus (USB) which only defines data, power, and return wires as part of the peripheral interface bus. Therefore, what is needed is a novel design for controlling power in computer systems which does not require a dedicated wire as part of the interface bus.
SUMMARY
The invention is directed at a non-intrusive power-up mechanism over an interface bus, which does not require a dedicated wire. In one embodiment, a peripheral device has a switch circuit coupled to a main processing portion of a computer by an interface bus, the switch circuit being configured to send an activated status signal through the interface bus in response to being activated. The status signal is for causing the main processing portion to enter a high power mode. The switch circuit and the processing portion are further configured to not directly affect the interface bus in response to the switch circuit being activated while the processing portion is in the high power mode.
The switch circuit may be coupled to the processing portion by a data line of the interface bus. The processing portion further includes a bias circuit coupled to a secondary power source for applying a bias signal to the interface bus in response to the processing portion being in low power mode and for removing the bias signal in response to high power mode. In a particular embodiment, the switch circuit features a mechanical switch coupled to the processing portion by the interface bus, and an enable/disable circuit coupled to mechanical switch for preventing the mechanical switch from directly affecting the bus during high power mode.
In a further embodiment, the processing portion is configured to execute software that prompts a user to decide whether or not to cause low power mode in response to receiving a notify data signal over the interface bus, where the notify data signal was generated by a switch detect circuit in the peripheral device.
In yet another embodiment, a repeater circuit is provided as part of a device coupled to the interface bus. The repeater circuit causes a second signal to be sent through an upstream portion of the interface bus in response to receiving a first signal, e.g., the activated status signal, through a downstream portion of the bus while the main processing portion is in lower power mode.


REFERENCES:
patent: 5606704 (1997-02-01), Pierce et al.
patent: 5737616 (1998-04-01), Watanabe
patent: 5778237 (1998-07-01), Yamamoto et al.
patent: 6026288 (2000-02-01), Bronner
patent: 6040845 (2000-03-01), Melo et al.

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