Signal via impedance adjustment tool

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C361S762000, C174S266000, C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06845492

ABSTRACT:
A computer-implemented method for adjusting signal via impedance includes identifying a signal via in a circuit design database. The signal via is flagged as having an impedance error. A window is established around the signal via, with the window lying on a single layer. Only vias in the window may be adjusted to minimize the impedance error. At least one via in the window is adjusted to minimize said impedance error.

REFERENCES:
patent: 4328530 (1982-05-01), Bajorek et al.
patent: 6388208 (2002-05-01), Kiani et al.

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