Coded data generation or conversion – Digital code to digital code converters – To or from run length limited codes
Reexamination Certificate
2002-04-30
2003-09-23
JeanPierre, Peguy (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from run length limited codes
C341S058000
Reexamination Certificate
active
06624764
ABSTRACT:
FIELD OF THE INVENTION
The present invention is related to a signal transmission device for minimizing simultaneous switching noise in integrated circuit chip (ICs), and in particular, to a signal transmission device which transmits n-bit parallel digital signals through an I/O driver to minimize simultaneous switching noise in integrated circuit chip and the signal transmission method thereof.
BACKGROUND OF THE INVENTION
In an integrated circuit chip, there is bound to proceed with a great deal of data transmissions and data processing tasks. With the increasing processing speed and data transmission rate and the decreasing rated working voltage for an integrated circuit, the inductance effect of the power/ground pads, especially wire-bond pads, in an integrated circuit chip is becoming more and more serious. FIG.
1
(
a
) shows an equivalent circuit diagram in which a plurality of power pads
11
and ground pads
12
are used to interconnect an I/O driver including N I/O buffers
13
with a common power bus V
cc
and a common ground bus GND, wherein the power pads
11
and the ground pads
12
are respectively represented by a parasitic inductor L
1
and a parasitic inductor L
2
as their parallel equivalent circuit elements, as shown in FIG.
1
(
b
). Because the voltage V
L1
across the inductors L
1
and the voltage V
L2
across the inductor L
2
are directly proportional to the variation of the current flowing therethrough (V=Ldi/dt), while a large number of I/O buffers
13
are switching logic states simultaneously in the same direction, the variation of the current flowing through the inductors L
1
or L
2
will increase to cause the voltages V
L1
or V
L2
to increase, so that the voltage V
N1
at node N
1
or the voltage V
N2
at node N
2
will decrease as well. A surge of instantaneous current will be developed to flow through the I/O buffers
13
, and thus power/ground noise will be generated in the power bus V
CC
and the ground bus GND. This noise is called simultaneous switching noise (SSN), commonly referred to as “ground/power bounce”. The simultaneous switching noise is subject to deteriorate the signal transmission quality and lead the I/O buffers
13
to false switching operations. In view of the adverse effect of the simultaneous switching noise, how to minimize the simultaneous switching noise in an integrated circuit chip is a major object of the present invention.
SUMMARY OF THE INVENTION
A first respect of the present invention is directed to a signal transmission device for transmitting n-bit parallel digital signals through an I/O driver to minimize simultaneous switching noise in an integrated circuit chip. The signal transmission device according to a first respect of the present invention includes: an encoder coupled to the I/O driver which receives the n-bit parallel digital signals and performs an encoding operation to the n-bit parallel digital signals to provide an encoded m-bit parallel digital signals for the I/O driver, where m>n and the encoding operation is performed by a rule that the number of logic-1 bits of the encoded m-bit parallel digital signals is maintained at p and the number of logic-0 bits of the encoded m-bit parallel digital signals is maintained at (m−p), where C
p
m
>2
n
and m>p>0, and a decoder coupled to the I/O driver which receives the encoded m-bit parallel digital signals and performs a decoding operation to the encoded m-bit parallel digital signals, so as to restore the n-bit parallel digital signals.
A second respect of the present invention is directed to a signal transmission device which transmits n-bit parallel digital signals through an I/O driver to reduce simultaneous switching noise in an integrated circuit chip. The signal transmission device according to a second respect of the present invention includes: an encoder coupled to the I/O driver which receives the n-bit parallel digital signals and performs an encoding operation to the n-bit parallel digital signals to provide an encoded m-bit parallel digital signals for the I/O driver, where m>n and the encoding operation is performed by a rule that the number of logic-1 bits of the encoded m-bit parallel digital signals is maintained at either p or p+1 and the number of logic-0 bits of the encoded m-bit parallel digital signals is maintained at either (m−p) or (m−p−1), where (C
p
m
+C
p+1
m
)>2
n
and m>p+1>p>0, and a decoder coupled to the I/O driver which receives the encoded m-bit parallel digital signals and performs a decoding operation to the encoded m-bit parallel digital signals, so as to restore the n-bit parallel digital signals.
A third respect of the present invention is directed to a signal transmission device which transmits n-bit parallel digital signals through an I/O driver to reduce simultaneous switching noise in an integrated circuit chip. The signal transmission device according to a third respect of the present invention includes: an encoder coupled to the I/O driver which receives the n-bit parallel digital signals and performs an encoding operation to the n-bit parallel digital signals to provide an encoded m-bit parallel digital signals for the I/O driver, where m>n and the encoding operation is performed by a rule that the number of logic-1 bits of the encoded m-bit parallel digital signals is limited within a range between p and (p+q) and the number of logic-0 bits of the encoded m-bit parallel digital signals is limited within a range between (m−p−q) and (m−p), where (C
p
m+C
p+1
m
+C
p+2
m
+. . . +C
p+q
m
)>2
n
and m>p+q>q>0, and a decoder coupled to the I/O driver which receives the encoded m-bit parallel digital signals and performs a decoding operation to the encoded m-bit parallel digital signals, so as to restore the n-bit parallel digital signals.
The I/O driver preferably includes m I/O buffers each shares a common power bus and a common ground bus, and is coupled with the common power bus and the common ground bus through power/ground pads. The encoding operation is performed by encoding each bit of the n-bit parallel digital signals one by one into the encoded m-bit parallel digital signals in conformity with the above-described rule, and the decoding operation is substantially an inverse of the encoding operation.
A fourth respect of the present invention is directed to a signal transmission method for transmitting n-bit parallel digital signals through an I/O driver to minimize simultaneous switching noise in an integrated circuit chip, including the following steps of: performing an encoding operation to the n-bit parallel digital signals to provide an encoded m-bit parallel digital signals for the I/O driver, where m>n and the encoding operation is performed by a rule that the number of logic-1 bits of the encoded m-bit parallel digital signals is maintained at p and a number of logic-0 bits of the encoded m-bit parallel digital signals is maintained at (m−p), where C
p
m
>2
n
and m>p>0, and performing a decoding operation to the encoded m-bit parallel digital signals to restore the n-bit parallel digital signals.
A fifth respect of the present invention is directed to a signal transmission method for transmitting n-bit parallel digital signals through an I/O driver to minimize simultaneous switching noise in an integrated circuit chip, including the following steps of: performing an encoding operation to the n-bit parallel digital signals to provide an encoded m-bit parallel digital signals for the I/O driver, where m>n and the encoding operation is performed by a rule that the number of logic-1 bits of the encoded m-bit parallel digital signals is maintained at either p or p+1 and the number of logic-0 bits of the encoded m-bit parallel digital signals is maintained at either (m−p) or (m−p−1), where (C
p
m
+C
p+1
m
)>2
n
and m>p+1>p>0, and performing a decoding operation to the encod
Jean-Pierre Peguy
VIA Technologies Inc.
Volpe and Koenig P.C.
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