Signal processor, prefetch instruction method and prefetch...

Details Signal processor, prefetch instruction method and prefetch... Signal processor, prefetch instruction method and prefetch...

2006-03-28

2006-03-28

Anderson, Matthew D. (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S204000, C711S213000, C711S217000, C712S241000

Reexamination Certificate

active

07020749

ABSTRACT:
A signal processor including a processor having a cache memory and a process execution unit executing a process by use of information temporarily stored in the cache memory and an external memory provided external to the processor. In the signal processor, the process execution unit automatically returns to a start point of a loop-type data at an end of the loop-type data and sequentially reads out the loop-type data from the external memory to the cache memory.

REFERENCES:
patent: 5357618 (1994-10-01), Mirza et al.
patent: 5752037 (1998-05-01), Gornish et al.
patent: 5898865 (1999-04-01), Mahalingaiah
patent: 6202130 (2001-03-01), Scales, III et al.
patent: 10-207706 (1998-08-01), None

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