Signal processor executing variable size instructions using...

Electrical computers and digital processing systems: processing – Instruction alignment

Reexamination Certificate

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C711S157000

Reexamination Certificate

active

06944748

ABSTRACT:
A digital signal processor is designed to execute variable-sized instructions that may include up to N elementary instruction codes. The processor comprises a memory program comprising I individually addressable, parallel-connected memory banks in which the codes of a program are recorded in an interlaced fashion, and a circuit for reading the program memory arranged to read a code in each of the I memory banks during a cycle for reading an instruction. A cycle for reading an instruction in the program memory includes reading a sequence of codes that includes the instruction code or codes to be read and can also include codes, belonging to a following instruction, that are filtered before the instruction is applied to execution units. The program memory of the digital signal processor does not include any no-operation type codes.

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Hennessy, John L. and Patterson, David A. “Computer Architecture A Quantitaive Approach”. Second Edition. San Francisci, CA: Morgan Kaufmann Publishers, Inc., ©1996. pp. 430-434.
“Webster's Ninth New Collegiate Dictionary”. Springfield, Mass.: Merriam-Webster, Inc., ©1990. pp. 995-996, terms “Remainder” and “Remainder Theorem”.
InstantWeb. “Online Computing Dictionary”. http://www.instantweb.com/foldoc/foldoc.cgi?computer+dictionary Search Term: modulo operator.

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