Electrical computers and digital processing systems: memory – Storage accessing and control
Reexamination Certificate
2007-02-08
2010-06-08
Rinehart, Mark (Department: 2111)
Electrical computers and digital processing systems: memory
Storage accessing and control
C700S004000, C710S111000, C710S113000, C710S117000
Reexamination Certificate
active
07734860
ABSTRACT:
For every sampling period of a DSP100, a timing generator200requests a CPU300to release a bus and provides a DSP100access time period to make an external memory400access the DSP100by occupying the bus released according to the request. In the DSP100, during the DSP access time period, a memory interface section11executes read/write processing in which waveform data read from the external memory400is stored in an internal memory12and waveform data read from the internal memory12is written into the external memory400according to the command stored in an access command memory10. At the same time, an operation section13executes operation processing by using the waveform data stored in the internal memory12independently of the read/write processing.
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Chinese Office Action dated May 9, 2008 (4 pages), and English translation thereof (6 pages), issued in counterpart Chinese Application Serial No. 2007100051802.
Casio Computer Co. Ltd.
Daley Christopher A
Frishauf Holtz Goodman & Chick P.C.
Rinehart Mark
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