Signal line impedance verification tool

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Reexamination Certificate

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06859915

ABSTRACT:
A computer-implemented method for verifying impedance of a signal line in an electrical circuit layout includes reading a desired impedance value for a signal line and identifying the signal line in a circuit design database. A window is established around the signal line in which circuit elements will be included in an impedance calculation for the signal line. The impedance of the signal line is calculated based on the circuit elements inside the window. The signal line is flagged if the calculated impedance differs from the desired impedance value.

REFERENCES:
patent: 6381730 (2002-04-01), Chang et al.
patent: 6530062 (2003-03-01), Liaw et al.
patent: 6546528 (2003-04-01), Sasaki et al.
patent: 6769102 (2004-07-01), Frank et al.

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