Signal line, a thin film transistor array panel comprising...

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Reexamination Certificate

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Details

C257S059000

Reexamination Certificate

active

07821009

ABSTRACT:
A thin film transistor array panel includes an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a source electrode formed on the gate insulating layer wherein the drain electrode faces the source electrode with a gap therebetween, and a pixel electrode connected to the drain electrode. At least one of the gate line, the data line, and the drain electrode includes a first conductive layer made of a conductive oxide and a second conductive layer of Ag that is deposited adjacent to the first conductive layer.

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English translation of JP 09-059787.
English Language Abstract, JP Patent First Publication No. 2003-036037, Feb. 7, 2003, 1 page.
English Language Abstract, JP Patent First Publication No. 2002-250936, Sep. 6, 2002, 1 page.
English Language Abstract, KR Patent First Publication No. 1020030024160, Mar. 26, 2003, 1 page.
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English Language Abstract, KR Patent First Publication No. 1020040036642, 1 page.
English Language Abstract, JP Patent First Publication No. 08-248442, Sep. 27, 1996, 1 page.

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