Signal integrity checking circuit

Details Signal integrity checking circuit Signal integrity checking circuit

2005-02-15

2005-02-15

Tran, M. (Department: 2818)

Static information storage and retrieval

Read/write circuit

For complementary information

C365S233100

Reexamination Certificate

active

06856557

ABSTRACT:
A signal integrity checking circuit for an integrated circuit detects whether signal condition involving loading of data into storage elements is valid or improper and flags the result. The integrity circuit includes a plurality of adjacently positioned and substantially similar storage elements, which are clocked by a common clock line and loaded from a common data input line. A common reset line may also be provided. The storage elements may be flip-flops, latches, RAM, etc. A logic gate, such as a NAND gate, receives the storage element outputs and flags improper loading of data. Inverters on the input and output sides of one storage element force it to the opposite state from the other storage element. The signal integrity checking circuit is valuable for ensuring proper loading during power-on or start-up, and at other times when loading of data may occur.

REFERENCES:
patent: 6218982 (2001-04-01), Shirai et al.
patent: 6584536 (2003-06-01), Deng

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