Signal generation decoder circuit and method

Details Signal generation decoder circuit and method Signal generation decoder circuit and method

1996-03-13

1997-08-26

Hudspeth, David R.

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Decoding

326 93, 365221, H03K 1900

Patent

active

056614187

ABSTRACT:
The present invention provides a circuit and method for manipulating the least significant bit (LSB) of the read and write count signal to generate a glitch free mutually non-exclusive decoder output. The present invention can be used to generate a logic to eliminate glitches in the inputs to a full/empty flag generator, an almost full/almost empty flag generator or a half-full/half-empty flag generator. The circuit can be extended to generate the logic to eliminate glitches in either direction as the count signals move across a boundary change in a half-full flag generation circuit.

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