Signal delay control circuit in a semiconductor memory device

Details Signal delay control circuit in a semiconductor memory device Signal delay control circuit in a semiconductor memory device

2005-01-18

2005-01-18

Nelms, David (Department: 2818)

Static information storage and retrieval

Read/write circuit

Signals

C365S189070, C365S189090, C365S193000, C365S148000, C365S198000

Reexamination Certificate

active

06845050

ABSTRACT:
A signal delay control circuit for use in a semiconductor memory device is disclosed. The circuit includes a first reference voltage generating unit for generating a first reference voltage; a second reference voltage generating unit for generating a second reference voltage that is lower than the first reference voltage; a control signal generating unit for generating a clock signal to drive input and output operations of internal circuits; and an impedance circuit in circuit with the first and second reference voltage generating units for generating a plurality of reference voltages to be applied to the internal circuits wherein the reference voltages are set in accordance with a distance between the control signal generating unit and the respective one of the internal circuits.

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