Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate
2006-09-21
2010-12-07
Chase, Shelly A (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error/fault detection technique
Reexamination Certificate
active
07849388
ABSTRACT:
An LDPC unit decoder included in a signal decoding device is provided with a parity checking unit that is a multiplier for performing multiplication of a check matrix (parity check matrix) and temporary estimated values of an encoded signal, computed by a temporary estimated value computation unit. A check matrix holding unit holds the check matrix. If s and t are natural numbers, s≧t≧2, among s columns extracted from this check matrix, t columns or less have a linearly independent relationship. These s columns are multiplied at locations where error occurrence frequency is relatively high, with regard to the temporary estimated values. According to this mode, the matrix is composed to include t columns that are linearly independent, that is, t columns that are not linearly dependent.
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Esumi Atsushi
Mizuno Hidemichi
Cantor & Colburn LLP
Chase Shelly A
Rohm & Co., Ltd.
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