Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2001-06-01
2003-02-04
Lee, Michael G. (Department: 2876)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S026000, C326S027000, C326S083000, C326S086000
Reexamination Certificate
active
06515501
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to signal transmission systems, and more particularly to techniques for transmitting signals between integrated circuit (IC) devices on printed circuit boards.
2. Description of the Related Art
Packaged integrated circuits (ICs) are commonly interconnected on printed circuit board (PC boards) by layers of conductors (commonly referred to as line traces). Modem PC boards have as many as 20-24 layers of line traces with pitch spacings as small as 4 MILs. As technology progresses, the signal transfer rate between ICs over these line traces increases as does the length and density of the line traces.
When the impedances between two ICs are mismatched, communication signal integrity between the ICs is degraded by effects such as reflections (e.g., transmission line effect) and dispersion (e.g., skin effect, dielectric losses, and trace resistances). These effects are accentuated with increased signal frequencies and the advancing lengths and densities of line traces found in today's PC board designs. Many of the ICs utilized in these designs are “off the shelf” devices in which their input and output impedance characteristics are not well controlled. A solution to better match the impedance between ICs is to place appropriate components, such as resistors and capacitors, on the line traces connecting the ICs. This addition can help compensate for transmission line effects and reduce voltage reflections. These techniques have drawbacks. Reactive components exhibit impedance change with frequency. Matching networks becomes complex if they are designed to match impedance over a wide spectrum. In addition, these components offer no gain. A resistive termination is preferable, but printed circuit board impedance and IC driving and receiving impedance are subject to manufacturing tolerances. This makes it difficult to establish a nominal value.
A new method of transmitting signals over the traces between ICs on a PC board is needed that enables signals to be transmitted over line traces while encountering limited signal degradating effects such as reflections or dispersions. The present invention addresses these and other problems by providing a method and device for maintaining signal integrity by matching impedances between ICs.
SUMMARY OF THE INVENTION
The present invention provides an improved method of transmitting communication signals across line traces between ICs on a printed circuit board (sometimes more generally referred to as a printed wiring board), multi-chip module, integrated circuit carrier or package, or other interconnect substrate. For purposes of illustration only, and without loss of generality, we use PCB terminology throughout the description. Nonetheless, persons of ordinary skill in the art will appreciate, based on the description herein, variations (including suitable scale variations, connection and attachment technology variations, material selections, etc.) suitable for the interconnect substrate employed by, or in conjunction with, a particular exploitation of the present invention.
In accordance with one aspect of the present invention, multiple ICs having mismatched input and output impedances are mounted on a PC board and communicate with each other across a conductor called a PC line trace. A signal buffer IC is placed in-line with the connecting line trace. The buffer is sized to fit within the pitch spacing of the line trace and contains an input impedance control circuit and an output impedance control circuit. These impedance control circuits are adapted to receive a control signal to set the input and output impedances of the buffer to correspond to the impedances of the connecting line traces. In this manner, the impedances between the ICs connected by this line trace are effectively matched and transmission line errors between them are reduced.
In general, receiving and driving impedances should match the characteristic impedance of the network to which they are connected or connectable. Such matching can be performed by switching on or off transistors of a signal buffer at the receiver and driver to the point where reflections are minimized or reduced to a suitable level. A feedback system is preferred where each line is driven during a calibration phase and the reflection levels are used as an error signal for switching transistors into and out of the receiver and driver until the reflections are minimized. This calibration phase can occur at a very low frequency, thereby minimizing the impact on timing overhead because changes in the physical properties of the system are relatively slow compared to signal speed.
In another embodiment of the present invention, the signal buffer is adapted to interface with multiple line traces and the impedance control circuits are capable of independently matching the corresponding impedances for each line trace.
In another embodiment, the IC package for the signal buffer is designed to be placed on existing line traces. In this embodiment, PC board includes two ICs which are connected by a line trace. The line trace is severed, and a signal buffer IC is placed on the PC board in-line with the severed line trace. The two severed ends of the line trace are then coupled to the signal buffer IC. In this manner, the impedance between the ICs can be matched after the PC board is manufactured.
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Bosnyak Robert J.
Cruz-Albrecht Jose M.
Lee Michael G.
Paik Steven S.
Sun Microsystems Inc.
Zagorin, O′Brien & Graham LLP
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