Signal alignment based on data signal

Details Signal alignment based on data signal Signal alignment based on data signal

2005-12-21

2010-02-16

Bocure, Tesfaldet (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

Reexamination Certificate

active

07664215

ABSTRACT:
Alignment of a receiver clock signal with a transmitter clock signal based upon a received data signal is disclosed. Some embodiments generate, based upon of phase bits and valid phase bits, a phase signal having a voltage level selected from at least three voltage levels. One voltage level corresponds to shifting the receiver clock signal in a first direction. Another voltage level corresponds to shifting the receiver clock signal in a second direction. The other voltage level corresponds to repeating a previous shift of the receiver clock signal.

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Fiedler et al: FP 15.1: A 1.062Gbps Transceiver with 2x-Oversampling and Transmit Signal Pre-Emphasis; 1997 IEEE Int'l Solid-State Circuits Conference; p. 238-239 & 464.
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Yang et al: A 0.5-μm CMOS 4.0-Gbit/s Serial Link Tranceiver with Data Recovery Using Oversampling; May 1998 IEEE Journal of Solid-State Circuits, vol. 33, No. 5; pages.

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