SiC-MISFET and method for fabricating the same

Details SiC-MISFET and method for fabricating the same SiC-MISFET and method for fabricating the same

2005-09-06

2005-09-06

Zarabian, Amir (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S548000, C257S550000, C438S197000, C438S514000, C438S518000

Reexamination Certificate

active

06940110

ABSTRACT:
A storage-type SiC-MISFET includes a SiC substrate, an n-type drift layer, a p-type well region, an n-type source region, a SiC channel layer which contains an n-type impurity and is to be a storage-type channel layer, a p-type heavily doped contact layer, a gate insulation film, a gate electrode and the like. In the storage-type SiC-MISFET, a partially heavily doped layer is formed by partially implanting ions of a p-type impurity into an upper surface portion of the n-type drift layer and containing an impurity of the same conductive type as that of the impurity implanted into the well region at a higher concentration than that in the well region.

REFERENCES:
patent: 6455892 (2002-09-01), Okuno et al.
patent: 6551865 (2003-04-01), Kumar et al.
patent: 6552363 (2003-04-01), Sridevan
patent: 6573534 (2003-06-01), Kumar et al.
patent: 6653659 (2003-11-01), Ryu et al.
patent: 2002/0167011 (2002-11-01), Kumar et al.
patent: 2003/0073270 (2003-04-01), Hisada et al.
patent: 2001-144292 (2001-05-01), None

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