Short channel trenched DMOS transistor

Details Short channel trenched DMOS transistor Short channel trenched DMOS transistor

1993-03-15

1994-08-23

Limanek, Robert

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257335, 257408, H01L 2910

Patent

active

053410114

ABSTRACT:
A DMOS transistor having a trenched gate is formed in a substrate such that the P body region of the transistor may be formed heavier or deeper while still maintaining a "short" channel. This is accomplished by forming a portion of the N+ type source region within the P body region prior to forming the trench, followed by a second implantation and diffusion of a relatively shallow extension of the N+ source region formed overlying a part of the P body region. The increased depth or doping concentration of the P body region advantageously lowers the resistance of the P body region, while the short channel lowers the on-resistance of the transistor for improved performance.

REFERENCES:
patent: 4954854 (1990-09-01), Dhong et al.
patent: 5168331 (1992-12-01), Yilmaz
Barbuscia, et al., pp. 757, IEDM, 1984 "Modeling of Polysilicon Dopant Diffusion for Shallow-Junction Bipolar Technology".
S. C. Sun et al., pp. 356-367, IEEE Trans, Electron Devices, vol. Ed-27, Feb. 1980 "Modeling of the On-Resistance of LDMOS, VDMOS, and VMOS Power Transistors".

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