Short channel non-self aligned VMOS field effect transistor

Details Short channel non-self aligned VMOS field effect transistor Short channel non-self aligned VMOS field effect transistor

1998-05-12

2000-11-21

Monin, Jr., Donald L.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257329, 257333, 257334, 438271, 438282, 438283, H01L 2976, H01L 2994, H01L 31062

Patent

active

061506931

ABSTRACT:
A field effect transistor (FET) with a V-shaped trench gate in a semiconductor substrate having gate oxide on the walls of the trench and a gate electrode material within the trench walls, and source/drain impurities in the semiconductor substrate and abutting the gate oxide. The resultant FET structure comprises a non-self align V-shaped gate with an effective channel length (L.sub.eff) of less than about one-half of the surface width of the gate. Because of the V-shaped structure of the gate, the effective length of the channel only extends from the edge of the source to the tip of the V-shaped gate. Due to this characteristic, the width of the gate at the surface of the semiconductor substrate can be two or more time the distance of the desired channel length thereby permitting conventional lithography to be used to fabricate gate lengths much shorter than the lithography limit. Preferably, the bottom or tip of the V shaped gate is rounded and concave.

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