Shifting the phase of a clock signal, in particular for clock re

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

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Details

327298, 327113, 327237, H03D 324, H03K 500, H03K 5159, H03K 513

Patent

active

053965230

ABSTRACT:
The invention relates to a clock recovery for a digital data signal. A phase detector receives the data signal and transmits it after clock recovery. A phase correcting device creates and transmits, by means of a number of auxiliary clock signals phase shifted with respect to each other and originating from an incoming clock signal (CK.sub.in), a recovered clock signal (CK.sub.out) for the data signal. The recovered clock signal is fed to the phase detector, which detects a phase position error, if any, between the data signal and its recovered clock signal and emits information regarding this to the phase correcting device. The phase correcting device includes a phase variation circuit arranged, if the phase position error deviates from zero and the phase position of the recovered clock signal is located between the phase positions of two of the auxiliary clock signals, to mix these two auxiliary clock signals with each other for forming an adjusted recovered clock signal with the same phase position as the data signal. The invention allows shifting of the phase of a clock signal continuously an arbitrary number of turns forwards or backwards without interruptions or discontinuities in the recovered clock signal. This implies that the invention can also be applied in the case of a difference occurring between the bit frequency of incoming data and the clock reference frequency.

REFERENCES:
patent: 3621406 (1971-11-01), Paine et al.
patent: 4218771 (1980-08-01), Hogge, Jr.
patent: 4423382 (1983-12-01), Becker
patent: 4808936 (1989-02-01), Lamb
patent: 4829257 (1989-05-01), Cooper
patent: 4955040 (1990-09-01), Sarkoezi

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